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Diffstat (limited to 'src/southbridge/via/k8t890')
-rw-r--r--src/southbridge/via/k8t890/k8m890_chrome.c8
-rw-r--r--src/southbridge/via/k8t890/k8t890_dram.c12
-rw-r--r--src/southbridge/via/k8t890/k8t890_early_car.c4
-rw-r--r--src/southbridge/via/k8t890/k8t890_pcie.c4
4 files changed, 14 insertions, 14 deletions
diff --git a/src/southbridge/via/k8t890/k8m890_chrome.c b/src/southbridge/via/k8t890/k8m890_chrome.c
index fdf55aa929..2cbd9382ae 100644
--- a/src/southbridge/via/k8t890/k8m890_chrome.c
+++ b/src/southbridge/via/k8t890/k8m890_chrome.c
@@ -125,7 +125,7 @@ chrome_init(struct device *dev)
fb_size = k8m890_host_fb_size_get();
if (!fb_size) {
- printk_warning("Chrome: Device has not been initialised in the"
+ printk(BIOS_WARNING, "Chrome: Device has not been initialised in the"
" ramcontroller!\n");
return;
}
@@ -133,11 +133,11 @@ chrome_init(struct device *dev)
fb_address = pci_read_config32(dev, 0x10);
fb_address &= ~0x0F;
if (!fb_address) {
- printk_warning("Chrome: No FB BAR assigned!\n");
+ printk(BIOS_WARNING, "Chrome: No FB BAR assigned!\n");
return;
}
- printk_info("Chrome: Using %dMB Framebuffer at 0x%08X.\n",
+ printk(BIOS_INFO, "Chrome: Using %dMB Framebuffer at 0x%08X.\n",
fb_size, fb_address);
//k8m890_host_fb_direct_set(fb_address);
@@ -154,7 +154,7 @@ chrome_init(struct device *dev)
vga_console_init();
#endif
- printk_info("Chrome VGA Textmode initialized.\n");
+ printk(BIOS_INFO, "Chrome VGA Textmode initialized.\n");
#if CONFIG_CONSOLE_VGA == 0
/* if we don't have console, at least print something... */
diff --git a/src/southbridge/via/k8t890/k8t890_dram.c b/src/southbridge/via/k8t890/k8t890_dram.c
index 84a41a46b8..ac67d4a5b6 100644
--- a/src/southbridge/via/k8t890/k8t890_dram.c
+++ b/src/southbridge/via/k8t890/k8t890_dram.c
@@ -82,7 +82,7 @@ static void get_memres(void *gp, struct device *dev, struct resource *res)
unsigned int *fbsize = (unsigned int *) gp;
uint64_t proposed_base = res->base + res->size - *fbsize;
- printk_debug("get_memres: res->base=%llx res->size=%llx %d %d %d\n",
+ printk(BIOS_DEBUG, "get_memres: res->base=%llx res->size=%llx %d %d %d\n",
res->base, res->size, (res->size > *fbsize),
(!(proposed_base & (*fbsize - 1))),
(proposed_base < ((uint64_t) 0xffffffff)));
@@ -99,7 +99,7 @@ extern uint64_t high_tables_base, high_tables_size;
if ((high_tables_base) && ((high_tables_base > proposed_base) &&
(high_tables_base < (res->base + res->size)))) {
high_tables_base = proposed_base - high_tables_size;
- printk_debug("Moving the high_tables_base pointer to "
+ printk(BIOS_DEBUG, "Moving the high_tables_base pointer to "
"new base %llx\n", high_tables_base);
}
#endif
@@ -140,12 +140,12 @@ static void dram_init_fb(struct device *dev)
ret = get_option(&fbbits, "videoram_size");
if (ret) {
- printk_warning("Failed to get videoram size (error %d), using default.\n", ret);
+ printk(BIOS_WARNING, "Failed to get videoram size (error %d), using default.\n", ret);
fbbits = 5;
}
if ((fbbits < 1) || (fbbits > 7)) {
- printk_warning("Invalid videoram size (%d), using default.\n",
+ printk(BIOS_WARNING, "Invalid videoram size (%d), using default.\n",
4 << fbbits);
fbbits = 5;
}
@@ -159,14 +159,14 @@ static void dram_init_fb(struct device *dev)
/* no space for FB */
if (!resmax) {
- printk_err("VIA FB: no space for framebuffer in RAM\n");
+ printk(BIOS_ERR, "VIA FB: no space for framebuffer in RAM\n");
return;
}
proposed_base = resmax->base + resmax->size - fbsize;
resmax->size -= fbsize;
- printk_info("K8M890: Using a %dMB framebuffer.\n", 4 << fbbits);
+ printk(BIOS_INFO, "K8M890: Using a %dMB framebuffer.\n", 4 << fbbits);
/* Step 1: enable UMA but no FB */
pci_write_config8(dev, 0xa1, 0x80);
diff --git a/src/southbridge/via/k8t890/k8t890_early_car.c b/src/southbridge/via/k8t890/k8t890_early_car.c
index 2b0c9e1609..a0a269bb94 100644
--- a/src/southbridge/via/k8t890/k8t890_early_car.c
+++ b/src/southbridge/via/k8t890/k8t890_early_car.c
@@ -114,7 +114,7 @@ u8 k8t890_early_setup_ht(void)
int s3_save_nvram_early(u32 dword, int size, int nvram_pos) {
- printk_debug("Writing %x of size %d to nvram pos: %d\n", dword, size, nvram_pos);
+ printk(BIOS_DEBUG, "Writing %x of size %d to nvram pos: %d\n", dword, size, nvram_pos);
switch (size) {
case 1:
outb((dword & 0xff), K8T890_NVRAM_IO_BASE+nvram_pos);
@@ -149,6 +149,6 @@ int s3_load_nvram_early(int size, u32 *old_dword, int nvram_pos) {
nvram_pos +=4;
break;
}
- printk_debug("Loading %x of size %d to nvram pos:%d\n", * old_dword, size, nvram_pos-size);
+ printk(BIOS_DEBUG, "Loading %x of size %d to nvram pos:%d\n", * old_dword, size, nvram_pos-size);
return nvram_pos;
}
diff --git a/src/southbridge/via/k8t890/k8t890_pcie.c b/src/southbridge/via/k8t890/k8t890_pcie.c
index 645296d40f..804398cf88 100644
--- a/src/southbridge/via/k8t890/k8t890_pcie.c
+++ b/src/southbridge/via/k8t890/k8t890_pcie.c
@@ -28,7 +28,7 @@ static void peg_init(struct device *dev)
{
u8 reg;
- printk_debug("Configuring PCIe PEG\n");
+ printk(BIOS_DEBUG, "Configuring PCIe PEG\n");
dump_south(dev);
/* Disable link. */
@@ -68,7 +68,7 @@ static void pcie_init(struct device *dev)
{
u8 reg;
- printk_debug("Configuring PCIe PEXs\n");
+ printk(BIOS_DEBUG, "Configuring PCIe PEXs\n");
dump_south(dev);
/* Disable link. */