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Diffstat (limited to 'src/southbridge/nvidia/mcp55/early_smbus.c')
-rw-r--r--src/southbridge/nvidia/mcp55/early_smbus.c36
1 files changed, 22 insertions, 14 deletions
diff --git a/src/southbridge/nvidia/mcp55/early_smbus.c b/src/southbridge/nvidia/mcp55/early_smbus.c
index b351b58022..254ec7689a 100644
--- a/src/southbridge/nvidia/mcp55/early_smbus.c
+++ b/src/southbridge/nvidia/mcp55/early_smbus.c
@@ -24,8 +24,8 @@
#include "smbus.h"
#define SMBUS0_IO_BASE 0x1000
-#define SMBUS1_IO_BASE (0x1000+(1<<8))
-/*SIZE 0x40 */
+#define SMBUS1_IO_BASE (0x1000 + (1 << 8))
+/* Size: 0x40 */
static void enable_smbus(void)
{
@@ -35,12 +35,14 @@ static void enable_smbus(void)
if (dev == PCI_DEV_INVALID)
die("SMBus controller not found\n");
- /* set smbus iobase */
+ /* Set SMBus I/O base. */
pci_write_config32(dev, 0x20, SMBUS0_IO_BASE | 1);
pci_write_config32(dev, 0x24, SMBUS1_IO_BASE | 1);
- /* Set smbus iospace enable */
+
+ /* Set SMBus I/O space enable. */
pci_write_config16(dev, 0x4, 0x01);
- /* clear any lingering errors, so the transaction will run */
+
+ /* Clear any lingering errors, so the transaction will run. */
outb(inb(SMBUS0_IO_BASE + SMBHSTSTAT), SMBUS0_IO_BASE + SMBHSTSTAT);
outb(inb(SMBUS1_IO_BASE + SMBHSTSTAT), SMBUS1_IO_BASE + SMBHSTSTAT);
}
@@ -60,28 +62,34 @@ static inline int smbus_read_byte(unsigned device, unsigned address)
return do_smbus_read_byte(SMBUS0_IO_BASE, device, address);
}
-static inline int smbus_write_byte(unsigned device, unsigned address, unsigned char val)
+static inline int smbus_write_byte(unsigned device, unsigned address,
+ unsigned char val)
{
return do_smbus_write_byte(SMBUS0_IO_BASE, device, address, val);
}
static inline int smbusx_recv_byte(unsigned smb_index, unsigned device)
{
- return do_smbus_recv_byte(SMBUS0_IO_BASE + (smb_index<<8), device);
+ return do_smbus_recv_byte(SMBUS0_IO_BASE + (smb_index << 8), device);
}
-static inline int smbusx_send_byte(unsigned smb_index, unsigned device, unsigned char val)
+static inline int smbusx_send_byte(unsigned smb_index, unsigned device,
+ unsigned char val)
{
- return do_smbus_send_byte(SMBUS0_IO_BASE + (smb_index<<8), device, val);
+ return do_smbus_send_byte(SMBUS0_IO_BASE + (smb_index << 8),
+ device, val);
}
-static inline int smbusx_read_byte(unsigned smb_index, unsigned device, unsigned address)
+static inline int smbusx_read_byte(unsigned smb_index, unsigned device,
+ unsigned address)
{
- return do_smbus_read_byte(SMBUS0_IO_BASE + (smb_index<<8), device, address);
+ return do_smbus_read_byte(SMBUS0_IO_BASE + (smb_index << 8),
+ device, address);
}
-static inline int smbusx_write_byte(unsigned smb_index, unsigned device, unsigned address, unsigned char val)
+static inline int smbusx_write_byte(unsigned smb_index, unsigned device,
+ unsigned address, unsigned char val)
{
- return do_smbus_write_byte(SMBUS0_IO_BASE + (smb_index<<8), device, address, val);
+ return do_smbus_write_byte(SMBUS0_IO_BASE + (smb_index << 8),
+ device, address, val);
}
-