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path: root/src/southbridge/nvidia/ck804/sata.c
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Diffstat (limited to 'src/southbridge/nvidia/ck804/sata.c')
-rw-r--r--src/southbridge/nvidia/ck804/sata.c35
1 files changed, 0 insertions, 35 deletions
diff --git a/src/southbridge/nvidia/ck804/sata.c b/src/southbridge/nvidia/ck804/sata.c
index b67cf28aba..c5dc56e83e 100644
--- a/src/southbridge/nvidia/ck804/sata.c
+++ b/src/southbridge/nvidia/ck804/sata.c
@@ -51,13 +51,6 @@ static void sata_com_reset(struct device *dev, unsigned reset)
*(base + 8) = dword;
*(base + 0x48) = dword;
-#if 0
- udelay(1000);
- dword &= ~(0xf);
- *(base + 8) = dword;
- *(base + 0x48) = dword;
-#endif
-
if (reset)
return;
@@ -109,17 +102,6 @@ static void sata_init(struct device *dev)
dword |= (1 << 1);
printk(BIOS_DEBUG, "SATA P\n");
}
-#if 0
- /* Write back */
- dword |= (1 << 12);
- dword |= (1 << 14);
-#endif
-
-#if 0
- /* ADMA */
- dword |= (1 << 16);
- dword |= (1 << 17);
-#endif
#if 1
/* DO NOT relay OK and PAGE_FRNDLY_DTXFR_CNT. */
@@ -128,23 +110,6 @@ static void sata_init(struct device *dev)
#endif
pci_write_config32(dev, 0x50, dword);
-#if 0
- /* SLUMBER_DURING_D3 */
- dword = pci_read_config32(dev, 0x7c);
- dword &= ~(1 << 4);
- pci_write_config32(dev, 0x7c, dword);
-
- dword = pci_read_config32(dev, 0xd0);
- dword &= ~(0xff << 24);
- dword |= (0x68 << 24);
- pci_write_config32(dev, 0xd0, dword);
-
- dword = pci_read_config32(dev, 0xe0);
- dword &= ~(0xff << 24);
- dword |= (0x68 << 24);
- pci_write_config32(dev, 0xe0, dword);
-#endif
-
dword = pci_read_config32(dev, 0xf8);
dword |= 2;
pci_write_config32(dev, 0xf8, dword);