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-rw-r--r--src/southbridge/intel/bd82x6x/acpi/globalnvs.asl4
-rw-r--r--src/southbridge/intel/lynxpoint/acpi/globalnvs.asl4
2 files changed, 0 insertions, 8 deletions
diff --git a/src/southbridge/intel/bd82x6x/acpi/globalnvs.asl b/src/southbridge/intel/bd82x6x/acpi/globalnvs.asl
index eafa3adacc..f64a845238 100644
--- a/src/southbridge/intel/bd82x6x/acpi/globalnvs.asl
+++ b/src/southbridge/intel/bd82x6x/acpi/globalnvs.asl
@@ -103,10 +103,6 @@ Field (GNVS, ByteAcc, NoLock, Preserve)
Offset (0xf5),
TPIQ, 8, // 0xf5 - trackpad IRQ value
CBMC, 32,
-
- /* ChromeOS specific */
- Offset (0x100),
- #include <vendorcode/google/chromeos/acpi/gnvs.asl>
}
/* Set flag to enable USB charging in S3 */
diff --git a/src/southbridge/intel/lynxpoint/acpi/globalnvs.asl b/src/southbridge/intel/lynxpoint/acpi/globalnvs.asl
index 179a9912cc..f4071f1144 100644
--- a/src/southbridge/intel/lynxpoint/acpi/globalnvs.asl
+++ b/src/southbridge/intel/lynxpoint/acpi/globalnvs.asl
@@ -93,10 +93,6 @@ Field (GNVS, ByteAcc, NoLock, Preserve)
Offset (0xa0),
CBMC, 32, // 0xa0 - coreboot mem console pointer
-
- /* ChromeOS specific */
- Offset (0x100),
- #include <vendorcode/google/chromeos/acpi/gnvs.asl>
}
/* Set flag to enable USB charging in S3 */