diff options
Diffstat (limited to 'src/southbridge/intel')
| -rw-r--r-- | src/southbridge/intel/bd82x6x/acpi/globalnvs.asl | 2 | ||||
| -rw-r--r-- | src/southbridge/intel/bd82x6x/include/soc/nvs.h | 2 | ||||
| -rw-r--r-- | src/southbridge/intel/bd82x6x/lpc.c | 1 | ||||
| -rw-r--r-- | src/southbridge/intel/ibexpeak/acpi/globalnvs.asl | 2 | ||||
| -rw-r--r-- | src/southbridge/intel/ibexpeak/include/soc/nvs.h | 2 | ||||
| -rw-r--r-- | src/southbridge/intel/ibexpeak/lpc.c | 1 | ||||
| -rw-r--r-- | src/southbridge/intel/lynxpoint/acpi/globalnvs.asl | 2 | ||||
| -rw-r--r-- | src/southbridge/intel/lynxpoint/include/soc/nvs.h | 2 | ||||
| -rw-r--r-- | src/southbridge/intel/lynxpoint/lpc.c | 1 |
9 files changed, 6 insertions, 9 deletions
diff --git a/src/southbridge/intel/bd82x6x/acpi/globalnvs.asl b/src/southbridge/intel/bd82x6x/acpi/globalnvs.asl index 9194f3f5ce..c6c7397031 100644 --- a/src/southbridge/intel/bd82x6x/acpi/globalnvs.asl +++ b/src/southbridge/intel/bd82x6x/acpi/globalnvs.asl @@ -58,7 +58,7 @@ Field (GNVS, ByteAcc, NoLock, Preserve) PCP0, 8, // 0x2a - PDC CPU/CORE 0 PCP1, 8, // 0x2b - PDC CPU/CORE 1 PPCM, 8, // 0x2c - Max. PPC state - PCNT, 8, // 0x2d - Processor count + , 8, // 0x2d - Processor count /* Super I/O & CMOS config */ Offset (0x32), NATP, 8, // 0x32 - diff --git a/src/southbridge/intel/bd82x6x/include/soc/nvs.h b/src/southbridge/intel/bd82x6x/include/soc/nvs.h index bbfa4c8d21..25e5b6edac 100644 --- a/src/southbridge/intel/bd82x6x/include/soc/nvs.h +++ b/src/southbridge/intel/bd82x6x/include/soc/nvs.h @@ -49,7 +49,7 @@ struct __packed global_nvs { u8 pcp0; /* 0x2a - PDC CPU/CORE 0 */ u8 pcp1; /* 0x2b - PDC CPU/CORE 1 */ u8 ppcm; /* 0x2c - Max. PPC state */ - u8 pcnt; /* 0x2d - Processor Count */ + u8 unused_was_pcnt; /* 0x2d - Processor Count */ u8 rsvd4[4]; /* Super I/O & CMOS config */ u8 natp; /* 0x32 - SIO type */ diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c index c2e7a86f09..a351bc3900 100644 --- a/src/southbridge/intel/bd82x6x/lpc.c +++ b/src/southbridge/intel/bd82x6x/lpc.c @@ -645,7 +645,6 @@ void soc_fill_gnvs(struct global_nvs *gnvs) { gnvs->apic = 1; gnvs->mpen = 1; /* Enable Multi Processing */ - gnvs->pcnt = dev_count_cpu(); } static const char *lpc_acpi_name(const struct device *dev) diff --git a/src/southbridge/intel/ibexpeak/acpi/globalnvs.asl b/src/southbridge/intel/ibexpeak/acpi/globalnvs.asl index 62e388801c..314141e65f 100644 --- a/src/southbridge/intel/ibexpeak/acpi/globalnvs.asl +++ b/src/southbridge/intel/ibexpeak/acpi/globalnvs.asl @@ -58,7 +58,7 @@ Field (GNVS, ByteAcc, NoLock, Preserve) PCP0, 8, // 0x2a - PDC CPU/CORE 0 PCP1, 8, // 0x2b - PDC CPU/CORE 1 PPCM, 8, // 0x2c - Max. PPC state - PCNT, 8, // 0x2d - Processor count + , 8, // 0x2d - Processor count /* Super I/O & CMOS config */ Offset (0x32), NATP, 8, // 0x32 - diff --git a/src/southbridge/intel/ibexpeak/include/soc/nvs.h b/src/southbridge/intel/ibexpeak/include/soc/nvs.h index 895591506d..42d588fdc6 100644 --- a/src/southbridge/intel/ibexpeak/include/soc/nvs.h +++ b/src/southbridge/intel/ibexpeak/include/soc/nvs.h @@ -50,7 +50,7 @@ struct __packed global_nvs { u8 pcp0; /* 0x2a - PDC CPU/CORE 0 */ u8 pcp1; /* 0x2b - PDC CPU/CORE 1 */ u8 ppcm; /* 0x2c - Max. PPC state */ - u8 pcnt; /* 0x2d - Processor Count */ + u8 unused_was_pcnt; /* 0x2d - Processor Count */ u8 rsvd4[4]; /* Super I/O & CMOS config */ u8 natp; /* 0x32 - SIO type */ diff --git a/src/southbridge/intel/ibexpeak/lpc.c b/src/southbridge/intel/ibexpeak/lpc.c index 9bc8e6be30..e4d64fd78b 100644 --- a/src/southbridge/intel/ibexpeak/lpc.c +++ b/src/southbridge/intel/ibexpeak/lpc.c @@ -545,7 +545,6 @@ void soc_fill_gnvs(struct global_nvs *gnvs) { gnvs->apic = 1; gnvs->mpen = 1; /* Enable Multi Processing */ - gnvs->pcnt = dev_count_cpu(); } static const char *lpc_acpi_name(const struct device *dev) diff --git a/src/southbridge/intel/lynxpoint/acpi/globalnvs.asl b/src/southbridge/intel/lynxpoint/acpi/globalnvs.asl index d95d38af10..249954d857 100644 --- a/src/southbridge/intel/lynxpoint/acpi/globalnvs.asl +++ b/src/southbridge/intel/lynxpoint/acpi/globalnvs.asl @@ -59,7 +59,7 @@ Field (GNVS, ByteAcc, NoLock, Preserve) PCP0, 8, // 0x2a - PDC CPU/CORE 0 PCP1, 8, // 0x2b - PDC CPU/CORE 1 PPCM, 8, // 0x2c - Max. PPC state - PCNT, 8, // 0x2d - Processor count + , 8, // 0x2d - Processor count /* Super I/O & CMOS config */ Offset (0x32), NATP, 8, // 0x32 - diff --git a/src/southbridge/intel/lynxpoint/include/soc/nvs.h b/src/southbridge/intel/lynxpoint/include/soc/nvs.h index aa35ea05a5..8027fe4b98 100644 --- a/src/southbridge/intel/lynxpoint/include/soc/nvs.h +++ b/src/southbridge/intel/lynxpoint/include/soc/nvs.h @@ -49,7 +49,7 @@ struct __packed global_nvs { u8 pcp0; /* 0x2a - PDC CPU/CORE 0 */ u8 pcp1; /* 0x2b - PDC CPU/CORE 1 */ u8 ppcm; /* 0x2c - Max. PPC state */ - u8 pcnt; /* 0x2d - Processor Count */ + u8 unused_was_pcnt; /* 0x2d - Processor Count */ u8 rsvd4[4]; /* Super I/O & CMOS config */ u8 natp; /* 0x32 - SIO type */ diff --git a/src/southbridge/intel/lynxpoint/lpc.c b/src/southbridge/intel/lynxpoint/lpc.c index 4868441aaf..2624aa9150 100644 --- a/src/southbridge/intel/lynxpoint/lpc.c +++ b/src/southbridge/intel/lynxpoint/lpc.c @@ -683,7 +683,6 @@ void soc_fill_gnvs(struct global_nvs *gnvs) { gnvs->apic = 1; gnvs->mpen = 1; /* Enable Multi Processing */ - gnvs->pcnt = dev_count_cpu(); } static const char *lpc_acpi_name(const struct device *dev) |