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-rw-r--r--src/southbridge/intel/bd82x6x/pch.h6
-rw-r--r--src/southbridge/intel/lynxpoint/pch.h2
2 files changed, 8 insertions, 0 deletions
diff --git a/src/southbridge/intel/bd82x6x/pch.h b/src/southbridge/intel/bd82x6x/pch.h
index 28323aca8f..f22fed59c3 100644
--- a/src/southbridge/intel/bd82x6x/pch.h
+++ b/src/southbridge/intel/bd82x6x/pch.h
@@ -51,6 +51,12 @@
#define DEFAULT_RCBA 0xfed1c000
#endif
+#if IS_ENABLED(CONFIG_SOUTHBRIDGE_INTEL_BD82X6X)
+#define CROS_GPIO_DEVICE_NAME "CougarPoint"
+#elif IS_ENABLED(CONFIG_SOUTHBRIDGE_INTEL_C216)
+#define CROS_GPIO_DEVICE_NAME "PantherPoint"
+#endif
+
#ifndef __ACPI__
#define DEBUG_PERIODIC_SMIS 0
diff --git a/src/southbridge/intel/lynxpoint/pch.h b/src/southbridge/intel/lynxpoint/pch.h
index a3cd811c7a..8cae50a949 100644
--- a/src/southbridge/intel/lynxpoint/pch.h
+++ b/src/southbridge/intel/lynxpoint/pch.h
@@ -19,6 +19,8 @@
#include <arch/acpi.h>
+#define CROS_GPIO_DEVICE_NAME "LynxPoint"
+
/*
* Lynx Point PCH PCI Devices:
*