diff options
Diffstat (limited to 'src/southbridge/intel')
| -rw-r--r-- | src/southbridge/intel/i82801gx/i82801gx_azalia.c | 22 | ||||
| -rw-r--r-- | src/southbridge/intel/i82801gx/i82801gx_usb_debug.c | 5 | ||||
| -rw-r--r-- | src/southbridge/intel/i82801gx/i82801gx_usb_ehci.c | 4 |
3 files changed, 15 insertions, 16 deletions
diff --git a/src/southbridge/intel/i82801gx/i82801gx_azalia.c b/src/southbridge/intel/i82801gx/i82801gx_azalia.c index fd71813f5a..21973ce3d6 100644 --- a/src/southbridge/intel/i82801gx/i82801gx_azalia.c +++ b/src/southbridge/intel/i82801gx/i82801gx_azalia.c @@ -40,10 +40,10 @@ static int set_bits(u8 * port, u32 mask, u32 val) /* Write (val & mask) to port */ val &= mask; - reg32 = readl(port); + reg32 = read32(port); reg32 &= ~mask; reg32 |= val; - writel(reg32, port); + write32(port, reg32); /* Wait for readback of register to * match what was just written to it @@ -52,7 +52,7 @@ static int set_bits(u8 * port, u32 mask, u32 val) do { /* Wait 1ms based on BKDG wait time */ mdelay(1); - reg32 = readl(port); + reg32 = read32(port); reg32 &= mask; } while ((reg32 != val) && --count); @@ -75,7 +75,7 @@ static int codec_detect(u8 * base) goto no_codec; /* Read in Codec location (BAR + 0xe)[2..0]*/ - reg32 = readl(base + 0xe); + reg32 = read32(base + 0xe); reg32 &= 0x0f; if (!reg32) goto no_codec; @@ -124,7 +124,7 @@ static int wait_for_ready(u8 *base) int timeout = 50; while(timeout--) { - u32 reg32 = readl(base + HDA_ICII_REG); + u32 reg32 = read32(base + HDA_ICII_REG); if (!(reg32 & HDA_ICII_BUSY)) return 0; udelay(1); @@ -144,16 +144,16 @@ static int wait_for_valid(u8 *base) u32 reg32; /* Send the verb to the codec */ - reg32 = readl(base + 0x68); + reg32 = read32(base + 0x68); reg32 |= (1 << 0) | (1 << 1); - writel(reg32, base + 0x68); + write32(base + 0x68, reg32); /* Use a 50 usec timeout - the Linux kernel uses the * same duration */ int timeout = 50; while(timeout--) { - reg32 = readl(base + HDA_ICII_REG); + reg32 = read32(base + HDA_ICII_REG); if ((reg32 & (HDA_ICII_VALID | HDA_ICII_BUSY)) == HDA_ICII_VALID) return 0; @@ -177,12 +177,12 @@ static void codec_init(struct device *dev, u8 * base, int addr) return; reg32 = (addr << 28) | 0x000f0000; - writel(reg32, base + 0x60); + write32(base + 0x60, reg32); if (wait_for_valid(base) == -1) return; - reg32 = readl(base + 0x64); + reg32 = read32(base + 0x64); /* 2 */ printk_debug("Azalia: codec viddid: %08x\n", reg32); @@ -199,7 +199,7 @@ static void codec_init(struct device *dev, u8 * base, int addr) if (wait_for_ready(base) == -1) return; - writel(verb[i], base + 0x60); + write32(base + 0x60, verb[i]); if (wait_for_valid(base) == -1) return; diff --git a/src/southbridge/intel/i82801gx/i82801gx_usb_debug.c b/src/southbridge/intel/i82801gx/i82801gx_usb_debug.c index 9460a34c2f..829ae6b819 100644 --- a/src/southbridge/intel/i82801gx/i82801gx_usb_debug.c +++ b/src/southbridge/intel/i82801gx/i82801gx_usb_debug.c @@ -31,10 +31,9 @@ void set_debug_port(unsigned port) u32 dbgctl; printk_debug("Enabling OWNER_CNT\n"); - dbgctl = readl(EHCI_BAR + EHCI_DEBUG_OFFSET); + dbgctl = read32(EHCI_BAR + EHCI_DEBUG_OFFSET); dbgctl |= (1 << 30); - writel(dbgctl, EHCI_BAR + EHCI_DEBUG_OFFSET); - + write32(EHCI_BAR + EHCI_DEBUG_OFFSET, dbgctl); } static void i82801gx_enable_usbdebug_direct(unsigned port) diff --git a/src/southbridge/intel/i82801gx/i82801gx_usb_ehci.c b/src/southbridge/intel/i82801gx/i82801gx_usb_ehci.c index 90ef28ae3a..9edee4faa8 100644 --- a/src/southbridge/intel/i82801gx/i82801gx_usb_ehci.c +++ b/src/southbridge/intel/i82801gx/i82801gx_usb_ehci.c @@ -53,8 +53,8 @@ static void usb_ehci_init(struct device *dev) /* Clear any pending port changes */ res = find_resource(dev, 0x10); base = res->base; - reg32 = readl((u8 *)base + 0x24) | (1 << 2); - writel(reg32, (u8 *)base + 0x24); + reg32 = read32((u8 *)base + 0x24) | (1 << 2); + write32((u8 *)base + 0x24, reg32); /* workaround */ reg8 = pci_read_config8(dev, 0x84); |