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Diffstat (limited to 'src/southbridge/intel')
-rw-r--r--src/southbridge/intel/i82371eb/bootblock.c3
-rw-r--r--src/southbridge/intel/i82371eb/early_pm.c3
-rw-r--r--src/southbridge/intel/i82371eb/early_smbus.c3
3 files changed, 3 insertions, 6 deletions
diff --git a/src/southbridge/intel/i82371eb/bootblock.c b/src/southbridge/intel/i82371eb/bootblock.c
index 05b2d2c487..844106dcc0 100644
--- a/src/southbridge/intel/i82371eb/bootblock.c
+++ b/src/southbridge/intel/i82371eb/bootblock.c
@@ -30,7 +30,6 @@ static pci_devfn_t pci_locate_device(unsigned int pci_id, pci_devfn_t dev)
void bootblock_early_southbridge_init(void)
{
u16 reg16;
- pci_devfn_t dev;
/*
* Note: The Intel 82371AB/EB/MB ISA device can be on different
@@ -39,7 +38,7 @@ void bootblock_early_southbridge_init(void)
* But scanning for the PCI IDs (instead of hardcoding
* bus/device/function numbers) works on all boards.
*/
- dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_INTEL,
+ const pci_devfn_t dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_INTEL,
PCI_DEVICE_ID_INTEL_82371AB_ISA), 0);
/* Enable access to the whole ROM, disable ROM write access. */
diff --git a/src/southbridge/intel/i82371eb/early_pm.c b/src/southbridge/intel/i82371eb/early_pm.c
index 62e790d5d4..48c761cad0 100644
--- a/src/southbridge/intel/i82371eb/early_pm.c
+++ b/src/southbridge/intel/i82371eb/early_pm.c
@@ -9,12 +9,11 @@
void enable_pm(void)
{
- pci_devfn_t dev;
u8 reg8;
u16 reg16;
/* Get the SMBus/PM device of the 82371AB/EB/MB. */
- dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_INTEL,
+ const pci_devfn_t dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_INTEL,
PCI_DEVICE_ID_INTEL_82371AB_SMB_ACPI), 0);
/* Set the PM I/O base. */
diff --git a/src/southbridge/intel/i82371eb/early_smbus.c b/src/southbridge/intel/i82371eb/early_smbus.c
index 97cf5fd7c0..1d080453e0 100644
--- a/src/southbridge/intel/i82371eb/early_smbus.c
+++ b/src/southbridge/intel/i82371eb/early_smbus.c
@@ -21,12 +21,11 @@ uintptr_t smbus_base(void)
int smbus_enable_iobar(uintptr_t base)
{
- pci_devfn_t dev;
u8 reg8;
u16 reg16;
/* Get the SMBus/PM device of the 82371AB/EB/MB. */
- dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_INTEL,
+ const pci_devfn_t dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_INTEL,
PCI_DEVICE_ID_INTEL_82371AB_SMB_ACPI), 0);
/* Set the SMBus I/O base. */