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-rw-r--r--src/southbridge/intel/fsp_rangeley/lpc.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/intel/fsp_rangeley/lpc.c b/src/southbridge/intel/fsp_rangeley/lpc.c
index 8f2967048a..80673a627d 100644
--- a/src/southbridge/intel/fsp_rangeley/lpc.c
+++ b/src/southbridge/intel/fsp_rangeley/lpc.c
@@ -52,7 +52,7 @@ static void soc_enable_apic(struct device *dev)
u32 reg32;
volatile u32 *ioapic_index = (volatile u32 *)(IO_APIC_ADDR);
volatile u32 *ioapic_data = (volatile u32 *)(IO_APIC_ADDR + 0x10);
- u32 *ilb_base = (u32 *)(pci_read_config32(dev, IBASE) & ~0x0f);
+ u8 *ilb_base = (u8 *)(pci_read_config32(dev, IBASE) & ~0x0f);
/*
* Enable ACPI I/O and power management.