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-rw-r--r--src/southbridge/intel/i82801gx/bootblock.c15
1 files changed, 15 insertions, 0 deletions
diff --git a/src/southbridge/intel/i82801gx/bootblock.c b/src/southbridge/intel/i82801gx/bootblock.c
index b352fcad03..153a456cb6 100644
--- a/src/southbridge/intel/i82801gx/bootblock.c
+++ b/src/southbridge/intel/i82801gx/bootblock.c
@@ -18,6 +18,18 @@
*/
#include <arch/io.h>
+#include <cpu/x86/tsc.h>
+
+static void store_initial_timestamp(void)
+{
+ /* On i945/ICH7 we have two 32bit scratchpad registers available:
+ * D0:F0 0xdc (SKPAD)
+ * D31:F2 0xd0 (SATA SP)
+ */
+ tsc_t tsc = rdtsc();
+ pci_write_config32(PCI_DEV(0, 0x00, 0), 0xdc, tsc.lo);
+ pci_write_config32(PCI_DEV(0, 0x1f, 2), 0xd0, tsc.hi);
+}
static void enable_spi_prefetch(void)
{
@@ -34,6 +46,9 @@ static void enable_spi_prefetch(void)
static void bootblock_southbridge_init(void)
{
+#if CONFIG_COLLECT_TIMESTAMPS
+ store_initial_timestamp();
+#endif
enable_spi_prefetch();
}