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-rw-r--r--src/southbridge/intel/lynxpoint/acpi/globalnvs.asl3
-rw-r--r--src/southbridge/intel/lynxpoint/nvs.h3
2 files changed, 5 insertions, 1 deletions
diff --git a/src/southbridge/intel/lynxpoint/acpi/globalnvs.asl b/src/southbridge/intel/lynxpoint/acpi/globalnvs.asl
index 8f6c8257c1..ef05dca3c2 100644
--- a/src/southbridge/intel/lynxpoint/acpi/globalnvs.asl
+++ b/src/southbridge/intel/lynxpoint/acpi/globalnvs.asl
@@ -131,6 +131,9 @@ Field (GNVS, ByteAcc, NoLock, Preserve)
S6B1, 32, // 0x98 - D21:F6 Serial IO UAR1 BAR1
S7B1, 32, // 0x9c - D23:F0 Serial IO SDIO BAR1
+ Offset (0xa0),
+ CBMC, 32, // 0xa0 - coreboot mem console pointer
+
/* IGD OpRegion */
Offset (0xb4),
ASLB, 32, // 0xb4 - IGD OpRegion Base Address
diff --git a/src/southbridge/intel/lynxpoint/nvs.h b/src/southbridge/intel/lynxpoint/nvs.h
index 3df1da1f20..4283ca13d5 100644
--- a/src/southbridge/intel/lynxpoint/nvs.h
+++ b/src/southbridge/intel/lynxpoint/nvs.h
@@ -90,7 +90,8 @@ typedef struct {
/* LynxPoint Serial IO device BARs */
u32 s0b[8]; /* 0x60 - 0x7f - BAR0 */
u32 s1b[8]; /* 0x80 - 0x9f - BAR1 */
- u8 rsvd6[20];
+ u32 cbmc; /* 0xa0 - 0xa3 - coreboot memconsole */
+ u8 rsvd6[16];
/* IGD OpRegion (not implemented yet) */
u32 aslb; /* 0xb4 - IGD OpRegion Base Address */
u8 ibtt; /* 0xb8 - IGD boot type */