diff options
Diffstat (limited to 'src/southbridge/intel')
| -rw-r--r-- | src/southbridge/intel/common/smi.c | 13 | ||||
| -rw-r--r-- | src/southbridge/intel/lynxpoint/smi.c | 9 |
2 files changed, 14 insertions, 8 deletions
diff --git a/src/southbridge/intel/common/smi.c b/src/southbridge/intel/common/smi.c index e5af3f136d..9bf763d75b 100644 --- a/src/southbridge/intel/common/smi.c +++ b/src/southbridge/intel/common/smi.c @@ -17,10 +17,9 @@ u16 get_pmbase(void) return lpc_get_pmbase(); } -void smm_southbridge_enable_smi(void) +static void smm_southbridge_enable(uint16_t pm1_events) { u32 smi_en; - u16 pm1_en; u32 gpe0_en; if (CONFIG(ELOG)) @@ -49,10 +48,7 @@ void smm_southbridge_enable_smi(void) gpe0_en &= ~PME_B0_EN; write_pmbase32(GPE0_EN, gpe0_en); - pm1_en = 0; - pm1_en |= PWRBTN_EN; - pm1_en |= GBL_EN; - write_pmbase16(PM1_EN, pm1_en); + write_pmbase16(PM1_EN, pm1_events); /* Enable SMI generation: * - on TCO events @@ -75,6 +71,11 @@ void smm_southbridge_enable_smi(void) write_pmbase32(SMI_EN, smi_en); } +void global_smi_enable(void) +{ + smm_southbridge_enable(PWRBTN_EN | GBL_EN); +} + void smm_setup_structures(void *gnvs, void *tcg, void *smi1) { /* diff --git a/src/southbridge/intel/lynxpoint/smi.c b/src/southbridge/intel/lynxpoint/smi.c index cddada1d18..df48d864d4 100644 --- a/src/southbridge/intel/lynxpoint/smi.c +++ b/src/southbridge/intel/lynxpoint/smi.c @@ -35,11 +35,11 @@ void smm_southbridge_clear_state(void) clear_gpe_status(); } -void smm_southbridge_enable_smi(void) +static void smm_southbridge_enable(uint16_t pm1_events) { printk(BIOS_DEBUG, "Enabling SMIs.\n"); /* Configure events */ - enable_pm1(PWRBTN_EN | GBL_EN); + enable_pm1(pm1_events); disable_gpe(PME_B0_EN); /* Enable SMI generation: @@ -53,6 +53,11 @@ void smm_southbridge_enable_smi(void) enable_smi(APMC_EN | SLP_SMI_EN | GBL_SMI_EN | EOS); } +void global_smi_enable(void) +{ + smm_southbridge_enable(PWRBTN_EN | GBL_EN); +} + static void __unused southbridge_trigger_smi(void) { /** |