4 files changed, 13 insertions, 5 deletions
diff --git a/src/southbridge/intel/i82801gx/Kconfig b/src/southbridge/intel/i82801gx/Kconfig
index afee190b2d..f63c12faaf 100644
--- a/src/southbridge/intel/i82801gx/Kconfig
+++ b/src/southbridge/intel/i82801gx/Kconfig
@@ -24,11 +24,19 @@ config SOUTHBRIDGE_INTEL_I82801GX
 	select HAVE_USBDEBUG
 	select USE_WATCHDOG_ON_BOOT
 
+if SOUTHBRIDGE_INTEL_I82801GX
+
 config EHCI_BAR
 	hex
-	default 0xfef00000 if SOUTHBRIDGE_INTEL_I82801GX
+	default 0xfef00000
 
 config EHCI_DEBUG_OFFSET
 	hex
-	default 0xa0 if SOUTHBRIDGE_INTEL_I82801GX
+	default 0xa0
+
+config USBDEBUG_DEFAULT_PORT
+	int
+	default 1 
+
+endif
 
diff --git a/src/southbridge/intel/i82801gx/i82801gx.h b/src/southbridge/intel/i82801gx/i82801gx.h
index 63c583dea5..9b0bb1ffd3 100644
--- a/src/southbridge/intel/i82801gx/i82801gx.h
+++ b/src/southbridge/intel/i82801gx/i82801gx.h
@@ -46,7 +46,7 @@ extern void i82801gx_enable(device_t dev);
 void enable_smbus(void);
 int smbus_read_byte(unsigned device, unsigned address);
 #endif
-void i82801gx_enable_usbdebug(unsigned int port);
+void enable_usbdebug(unsigned int port);
 #endif
 
 #define MAINBOARD_POWER_OFF	0
diff --git a/src/southbridge/intel/i82801gx/usb_debug.c b/src/southbridge/intel/i82801gx/usb_debug.c
index 991aa5adaa..ac7d3c2ed9 100644
--- a/src/southbridge/intel/i82801gx/usb_debug.c
+++ b/src/southbridge/intel/i82801gx/usb_debug.c
@@ -31,7 +31,7 @@ void set_debug_port(unsigned int port)
 	/* Not needed, the ICH* southbridges hardcode physical USB port 1. */
 }
 
-void i82801gx_enable_usbdebug(unsigned int port)
+void enable_usbdebug(unsigned int port)
 {
 	u32 dbgctl;
 	device_t dev = PCI_DEV(0, 0x1d, 7); /* USB EHCI, D29:F7 */
diff --git a/src/southbridge/intel/sch/usb_debug.c b/src/southbridge/intel/sch/usb_debug.c
index 58e0c330d8..c3cfdedfab 100644
--- a/src/southbridge/intel/sch/usb_debug.c
+++ b/src/southbridge/intel/sch/usb_debug.c
@@ -30,7 +30,7 @@ void set_debug_port(unsigned int port)
 	/* Not needed, the southbridges hardcode physical USB port 1. */
 }
 
-void sch_enable_usbdebug(unsigned int port)
+void enable_usbdebug(unsigned int port)
 {
 	u32 dbgctl;
 	device_t dev = PCI_DEV(0, 0x1d, 7); /* USB EHCI, D29:F7 */