3 files changed, 6 insertions, 6 deletions
diff --git a/src/southbridge/intel/i82801gx/ide.c b/src/southbridge/intel/i82801gx/ide.c
index 71fc738632..05f1e0a04f 100644
--- a/src/southbridge/intel/i82801gx/ide.c
+++ b/src/southbridge/intel/i82801gx/ide.c
@@ -18,7 +18,7 @@ static void ide_init(struct device *dev)
 	const struct southbridge_intel_i82801gx_config *config = dev->chip_info;
 
 	printk(BIOS_DEBUG, "i82801gx_ide: initializing...");
-	if (config == NULL) {
+	if (config == nullptr) {
 		printk(BIOS_ERR, "\ni82801gx_ide: Not mentioned in devicetree.cb!\n");
 		// Trying to set somewhat safe defaults instead of bailing out.
 		enable_primary = enable_secondary = 1;
diff --git a/src/southbridge/intel/i82801gx/pcie.c b/src/southbridge/intel/i82801gx/pcie.c
index befbf3beb7..f4b3dbd4bb 100644
--- a/src/southbridge/intel/i82801gx/pcie.c
+++ b/src/southbridge/intel/i82801gx/pcie.c
@@ -138,7 +138,7 @@ static void root_port_commit_config(struct device *dev)
 	int i;
 	bool coalesce = false;
 
-	if (dev->chip_info != NULL) {
+	if (dev->chip_info != nullptr) {
 		const struct southbridge_intel_i82801gx_config *config = dev->chip_info;
 		coalesce = config->pcie_port_coalesce;
 	}
@@ -151,8 +151,8 @@ static void root_port_commit_config(struct device *dev)
 
 		pcie_dev = rpc.ports[i];
 
-		if (pcie_dev == NULL) {
-			printk(BIOS_ERR, "Root Port %d device is NULL?\n", i + 1);
+		if (pcie_dev == nullptr) {
+			printk(BIOS_ERR, "Root Port %d device is nullptr?\n", i + 1);
 			continue;
 		}
 
diff --git a/src/southbridge/intel/i82801gx/sata.c b/src/southbridge/intel/i82801gx/sata.c
index 31aeaf60be..fbbea7c897 100644
--- a/src/southbridge/intel/i82801gx/sata.c
+++ b/src/southbridge/intel/i82801gx/sata.c
@@ -76,7 +76,7 @@ static void sata_init(struct device *dev)
 
 	printk(BIOS_DEBUG, "i82801gx_sata: initializing...\n");
 
-	if (config == NULL) {
+	if (config == nullptr) {
 		printk(BIOS_ERR, "i82801gx_sata: error: device not in devicetree.cb!\n");
 		return;
 	}
@@ -130,7 +130,7 @@ static void sata_init(struct device *dev)
 		pci_write_config8(dev, INTR_LN, 0x0a);
 
 		struct resource *ahci_res = probe_resource(dev, PCI_BASE_ADDRESS_5);
-		if (ahci_res != NULL)
+		if (ahci_res != nullptr)
 			/* write AHCI GHC_PI register */
 			write32(res2mmio(ahci_res, 0xc, 0), config->sata_ports_implemented);
 		break;