summaryrefslogtreecommitdiff
path: root/src/southbridge/intel
diff options
context:
space:
mode:
Diffstat (limited to 'src/southbridge/intel')
-rw-r--r--src/southbridge/intel/bd82x6x/Makefile.inc16
1 files changed, 16 insertions, 0 deletions
diff --git a/src/southbridge/intel/bd82x6x/Makefile.inc b/src/southbridge/intel/bd82x6x/Makefile.inc
index 9ffed9babb..eca3d9e2af 100644
--- a/src/southbridge/intel/bd82x6x/Makefile.inc
+++ b/src/southbridge/intel/bd82x6x/Makefile.inc
@@ -17,6 +17,11 @@
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
+# Run an intermediate step when producing coreboot.rom
+# that adds additional components to the final firmware
+# image outside of CBFS
+INTERMEDIATE+=bd82x6x_add_me
+
driver-y += pch.c
driver-y += azalia.c
driver-y += lpc.c
@@ -46,3 +51,14 @@ smm-$(CONFIG_USBDEBUG) += usb_debug.c
romstage-y += reset.c
romstage-y += early_spi.c
+bd82x6x_add_me: $(obj)/coreboot.pre $(IFDTOOL)
+ printf " DD Adding Intel Firmware Descriptor\n"
+ dd if=3rdparty/mainboard/$(MAINBOARDDIR)/descriptor.bin \
+ of=$(obj)/coreboot.pre conv=notrunc >/dev/null 2>&1
+ printf " IFDTOOL me.bin -> coreboot.pre\n"
+ $(objutil)/ifdtool/ifdtool \
+ -i ME:3rdparty/mainboard/$(MAINBOARDDIR)/me.bin \
+ $(obj)/coreboot.pre
+ mv $(obj)/coreboot.pre.new $(obj)/coreboot.pre
+
+PHONY += bd82x6x_add_me