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Diffstat (limited to 'src/southbridge/intel/sch/smihandler.c')
-rw-r--r-- | src/southbridge/intel/sch/smihandler.c | 7 |
1 files changed, 0 insertions, 7 deletions
diff --git a/src/southbridge/intel/sch/smihandler.c b/src/southbridge/intel/sch/smihandler.c index 2ccbc7f9ba..507413820a 100644 --- a/src/southbridge/intel/sch/smihandler.c +++ b/src/southbridge/intel/sch/smihandler.c @@ -229,13 +229,6 @@ static void dump_tco_status(u32 tco_sts) } #endif - -/* We are using PCIe accesses for now - * 1. the chipset can do it - * 2. we don't need to worry about how we leave 0xcf8/0xcfc behind - */ -//#include "../../../northbridge/intel/i945/pcie_config.c" - int southbridge_io_trap_handler(int smif) { //global_nvs_t *gnvs = (global_nvs_t *)0xc00; |