3 files changed, 31 insertions, 0 deletions
diff --git a/src/southbridge/intel/lynxpoint/iobp.c b/src/southbridge/intel/lynxpoint/iobp.c
index ad2527f00b..90cc075780 100644
--- a/src/southbridge/intel/lynxpoint/iobp.c
+++ b/src/southbridge/intel/lynxpoint/iobp.c
@@ -109,3 +109,31 @@ void pch_iobp_update(u32 address, u32 andvalue, u32 orvalue)
 
 	pch_iobp_write(address, data);
 }
+
+void pch_iobp_exec(u32 addr, u16 op_code, u8 route_id, u32 *data, u8 *resp)
+{
+	if (!data || !resp)
+		return;
+
+	*resp = -1;
+	if (!iobp_poll())
+		return;
+
+	/* RCBA2330[31:0] = Address */
+	RCBA32(IOBPIRI) = addr;
+	/* RCBA2338[15:8] = opcode */
+	RCBA16(IOBPS) = (RCBA16(IOBPS) & 0x00ff) | op_code;
+	/* RCBA233A[15:8] = 0xf0 RCBA233A[7:0] = Route ID */
+	RCBA16(IOBPU) = IOBPU_MAGIC | route_id;
+
+	if (op_code == IOBP_PCICFG_WRITE)
+		RCBA32(IOBPD) = *data;
+	/* Set RCBA2338[0] to trigger IOBP transaction*/
+	RCBA16(IOBPS) = RCBA16(IOBPS) | 0x1;
+
+	if (!iobp_poll())
+		return;
+
+	*resp = (RCBA16(IOBPS) & IOBPS_TX_MASK) >> 1;
+	*data = RCBA32(IOBPD);
+}
diff --git a/src/southbridge/intel/lynxpoint/iobp.h b/src/southbridge/intel/lynxpoint/iobp.h
index c8669bafd5..458e6be977 100644
--- a/src/southbridge/intel/lynxpoint/iobp.h
+++ b/src/southbridge/intel/lynxpoint/iobp.h
@@ -8,5 +8,6 @@
 u32 pch_iobp_read(u32 address);
 void pch_iobp_write(u32 address, u32 data);
 void pch_iobp_update(u32 address, u32 andvalue, u32 orvalue);
+void pch_iobp_exec(u32 addr, u16 op_dcode, u8 route_id, u32 *data, u8 *resp);
 
 #endif
diff --git a/src/southbridge/intel/lynxpoint/pch.h b/src/southbridge/intel/lynxpoint/pch.h
index c095298942..7b09d54f18 100644
--- a/src/southbridge/intel/lynxpoint/pch.h
+++ b/src/southbridge/intel/lynxpoint/pch.h
@@ -460,6 +460,8 @@ void mainboard_config_rcba(void);
 #define  IOBPS_WRITE	0x0700
 #define IOBPU		0x233a
 #define  IOBPU_MAGIC	0xf000
+#define  IOBP_PCICFG_READ	0x0400
+#define  IOBP_PCICFG_WRITE	0x0500
 
 #define D31IP		0x3100	/* 32bit */
 #define D31IP_TTIP	24	/* Thermal Throttle Pin */