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-rw-r--r--src/southbridge/intel/lynxpoint/acpi/globalnvs.asl3
-rw-r--r--src/southbridge/intel/lynxpoint/include/soc/nvs.h4
2 files changed, 7 insertions, 0 deletions
diff --git a/src/southbridge/intel/lynxpoint/acpi/globalnvs.asl b/src/southbridge/intel/lynxpoint/acpi/globalnvs.asl
index 979e084161..1b06beb7b6 100644
--- a/src/southbridge/intel/lynxpoint/acpi/globalnvs.asl
+++ b/src/southbridge/intel/lynxpoint/acpi/globalnvs.asl
@@ -93,6 +93,9 @@ Field (GNVS, ByteAcc, NoLock, Preserve)
Offset (0xa0),
CBMC, 32, // 0xa0 - coreboot mem console pointer
+
+ PM1I, 32, // System Wake Source - PM1 Index
+ GPEI, 32, // GPE Wake Source
}
/* Set flag to enable USB charging in S3 */
diff --git a/src/southbridge/intel/lynxpoint/include/soc/nvs.h b/src/southbridge/intel/lynxpoint/include/soc/nvs.h
index 17ded13589..7db206e6e9 100644
--- a/src/southbridge/intel/lynxpoint/include/soc/nvs.h
+++ b/src/southbridge/intel/lynxpoint/include/soc/nvs.h
@@ -73,6 +73,10 @@ struct __packed global_nvs {
u32 s0b[8]; /* 0x60 - 0x7f - BAR0 */
u32 s1b[8]; /* 0x80 - 0x9f - BAR1 */
u32 cbmc; /* 0xa0 - 0xa3 - coreboot memconsole */
+
+ /* Required for future unified acpi_save_wake_source. */
+ u32 pm1i;
+ u32 gpei;
};
#endif /* SOUTHBRIDGE_INTEL_LYNXPOINT_NVS_H */