diff options
Diffstat (limited to 'src/southbridge/intel/lynxpoint')
-rw-r--r-- | src/southbridge/intel/lynxpoint/acpi/pch.asl | 2 | ||||
-rw-r--r-- | src/southbridge/intel/lynxpoint/lpc.c | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/src/southbridge/intel/lynxpoint/acpi/pch.asl b/src/southbridge/intel/lynxpoint/acpi/pch.asl index f97a5ad58d..50f73cdf9c 100644 --- a/src/southbridge/intel/lynxpoint/acpi/pch.asl +++ b/src/southbridge/intel/lynxpoint/acpi/pch.asl @@ -19,7 +19,7 @@ Scope (\) } // Root Complex Register Block - OperationRegion (RCRB, SystemMemory, CONFIG_FIXED_RCBA_MMIO_BASE, 0x4000) + OperationRegion (RCRB, SystemMemory, CONFIG_FIXED_RCBA_MMIO_BASE, CONFIG_RCBA_LENGTH) Field (RCRB, DWordAcc, Lock, Preserve) { Offset (0x3404), // High Performance Timer Configuration diff --git a/src/southbridge/intel/lynxpoint/lpc.c b/src/southbridge/intel/lynxpoint/lpc.c index 20b9b4318f..b0ff5450cf 100644 --- a/src/southbridge/intel/lynxpoint/lpc.c +++ b/src/southbridge/intel/lynxpoint/lpc.c @@ -560,7 +560,7 @@ static void pch_lpc_add_mmio_resources(struct device *dev) if (CONFIG_FIXED_RCBA_MMIO_BASE < default_decode_base) { res = new_resource(dev, RCBA); res->base = (resource_t)CONFIG_FIXED_RCBA_MMIO_BASE; - res->size = 16 * 1024; + res->size = CONFIG_RCBA_LENGTH; res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED | IORESOURCE_RESERVE; } |