1 files changed, 2 insertions, 19 deletions
diff --git a/src/southbridge/intel/lynxpoint/pch.h b/src/southbridge/intel/lynxpoint/pch.h
index 2aa6b48785..026fcdd383 100644
--- a/src/southbridge/intel/lynxpoint/pch.h
+++ b/src/southbridge/intel/lynxpoint/pch.h
@@ -83,11 +83,8 @@
 #endif
 
 #define HPET_ADDR		0xfed00000
-#ifndef __ACPI__
-#define DEFAULT_RCBA		((u8 *)0xfed1c000)
-#else
-#define DEFAULT_RCBA		0xfed1c000
-#endif
+
+#include <southbridge/intel/common/rcba.h>
 
 #ifndef __ACPI__
 
@@ -477,20 +474,6 @@ void mainboard_config_superio(void);
 
 #define PMBASE		0x40
 
-/* Root Complex Register Block */
-#define RCBA		0xf0
-
-#define RCBA8(x) *((volatile u8 *)(DEFAULT_RCBA + x))
-#define RCBA16(x) *((volatile u16 *)(DEFAULT_RCBA + x))
-#define RCBA32(x) *((volatile u32 *)(DEFAULT_RCBA + x))
-
-#define RCBA_AND_OR(bits, x, and, or) \
-        RCBA##bits(x) = ((RCBA##bits(x) & (and)) | (or))
-#define RCBA8_AND_OR(x, and, or)  RCBA_AND_OR(8, x, and, or)
-#define RCBA16_AND_OR(x, and, or) RCBA_AND_OR(16, x, and, or)
-#define RCBA32_AND_OR(x, and, or) RCBA_AND_OR(32, x, and, or)
-#define RCBA32_OR(x, or) RCBA_AND_OR(32, x, ~0UL, or)
-
 #define VCH		0x0000	/* 32bit */
 #define VCAP1		0x0004	/* 32bit */
 #define VCAP2		0x0008	/* 32bit */