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path: root/src/southbridge/intel/lynxpoint/early_pch.c
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Diffstat (limited to 'src/southbridge/intel/lynxpoint/early_pch.c')
-rw-r--r--src/southbridge/intel/lynxpoint/early_pch.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/intel/lynxpoint/early_pch.c b/src/southbridge/intel/lynxpoint/early_pch.c
index 5378428e83..eabf548d7a 100644
--- a/src/southbridge/intel/lynxpoint/early_pch.c
+++ b/src/southbridge/intel/lynxpoint/early_pch.c
@@ -52,7 +52,7 @@ int pch_is_lp(void)
static void pch_enable_bars(void)
{
/* Setting up Southbridge. In the northbridge code. */
- pci_write_config32(PCH_LPC_DEV, RCBA, DEFAULT_RCBA | 1);
+ pci_write_config32(PCH_LPC_DEV, RCBA, (uintptr_t)DEFAULT_RCBA | 1);
pci_write_config32(PCH_LPC_DEV, PMBASE, DEFAULT_PMBASE | 1);
/* Enable ACPI BAR */