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Diffstat (limited to 'src/southbridge/intel/lynxpoint/acpi/serialio.asl')
-rw-r--r--src/southbridge/intel/lynxpoint/acpi/serialio.asl44
1 files changed, 44 insertions, 0 deletions
diff --git a/src/southbridge/intel/lynxpoint/acpi/serialio.asl b/src/southbridge/intel/lynxpoint/acpi/serialio.asl
index 4c0d36bcc6..59228d6cf5 100644
--- a/src/southbridge/intel/lynxpoint/acpi/serialio.asl
+++ b/src/southbridge/intel/lynxpoint/acpi/serialio.asl
@@ -211,6 +211,28 @@ Device (I2C0)
Return (0xF)
}
}
+
+ // Access to PCI Config in ACPI mode
+ OperationRegion (KEYS, SystemMemory, \S1B1, 0x100)
+ Field (KEYS, DWordAcc, NoLock, Preserve)
+ {
+ Offset (0x84),
+ PSAT, 32,
+ }
+
+ // Put controller in D0 state
+ Method (_PS0, 0, Serialized)
+ {
+ And (^PSAT, 0xfffffffc, ^PSAT)
+ Store (^PSAT, Local0)
+ }
+
+ // Put controller in D3Hot state
+ Method (_PS3, 0, Serialized)
+ {
+ Or (^PSAT, 0x00000003, ^PSAT)
+ Store (^PSAT, Local0)
+ }
}
Device (I2C1)
@@ -262,6 +284,28 @@ Device (I2C1)
Return (0xF)
}
}
+
+ // Access to PCI Config in ACPI mode
+ OperationRegion (KEYS, SystemMemory, \S2B1, 0x100)
+ Field (KEYS, DWordAcc, NoLock, Preserve)
+ {
+ Offset (0x84),
+ PSAT, 32,
+ }
+
+ // Put controller in D0 state
+ Method (_PS0, 0, Serialized)
+ {
+ And (^PSAT, 0xfffffffc, ^PSAT)
+ Store (^PSAT, Local0)
+ }
+
+ // Put controller in D3Hot state
+ Method (_PS3, 0, Serialized)
+ {
+ Or (^PSAT, 0x00000003, ^PSAT)
+ Store (^PSAT, Local0)
+ }
}
Device (SPI0)