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Diffstat (limited to 'src/southbridge/intel/ibexpeak')
-rw-r--r--src/southbridge/intel/ibexpeak/Kconfig1
-rw-r--r--src/southbridge/intel/ibexpeak/lpc.c12
2 files changed, 13 insertions, 0 deletions
diff --git a/src/southbridge/intel/ibexpeak/Kconfig b/src/southbridge/intel/ibexpeak/Kconfig
index 41ace46f7f..4b78118e4d 100644
--- a/src/southbridge/intel/ibexpeak/Kconfig
+++ b/src/southbridge/intel/ibexpeak/Kconfig
@@ -36,6 +36,7 @@ config SOUTH_BRIDGE_OPTIONS # dummy
select ACPI_SATA_GENERATOR
select HAVE_INTEL_FIRMWARE
select SOUTHBRIDGE_INTEL_COMMON_GPIO
+ select HAVE_INTEL_CHIPSET_LOCKDOWN
config EHCI_BAR
hex
diff --git a/src/southbridge/intel/ibexpeak/lpc.c b/src/southbridge/intel/ibexpeak/lpc.c
index a152dfe8b9..bc50f94d6b 100644
--- a/src/southbridge/intel/ibexpeak/lpc.c
+++ b/src/southbridge/intel/ibexpeak/lpc.c
@@ -782,6 +782,17 @@ static void southbridge_fill_ssdt(device_t device)
intel_acpi_pcie_hotplug_generator(chip->pcie_hotplug_map, 8);
}
+static void lpc_final(struct device *dev)
+{
+ /* Call SMM finalize() handlers before resume */
+ if (IS_ENABLED(CONFIG_HAVE_SMI_HANDLER)) {
+ if (IS_ENABLED(CONFIG_INTEL_CHIPSET_LOCKDOWN) ||
+ acpi_is_wakeup_s3()) {
+ outb(APM_CNT_FINALIZE, APM_CNT);
+ }
+ }
+}
+
static struct pci_operations pci_ops = {
.set_subsystem = set_subsystem,
};
@@ -794,6 +805,7 @@ static struct device_operations device_ops = {
.acpi_fill_ssdt_generator = southbridge_fill_ssdt,
.write_acpi_tables = acpi_write_hpet,
.init = lpc_init,
+ .final = lpc_final,
.enable = pch_lpc_enable,
.scan_bus = scan_lpc_bus,
.ops_pci = &pci_ops,