summaryrefslogtreecommitdiff
path: root/src/southbridge/intel/ibexpeak
diff options
context:
space:
mode:
Diffstat (limited to 'src/southbridge/intel/ibexpeak')
-rw-r--r--src/southbridge/intel/ibexpeak/Kconfig1
-rw-r--r--src/southbridge/intel/ibexpeak/sata.c8
2 files changed, 9 insertions, 0 deletions
diff --git a/src/southbridge/intel/ibexpeak/Kconfig b/src/southbridge/intel/ibexpeak/Kconfig
index ccd16bf8f1..f31f83c1a5 100644
--- a/src/southbridge/intel/ibexpeak/Kconfig
+++ b/src/southbridge/intel/ibexpeak/Kconfig
@@ -35,6 +35,7 @@ config SOUTH_BRIDGE_OPTIONS # dummy
select SOUTHBRIDGE_INTEL_COMMON
select HAVE_USBDEBUG_OPTIONS
select COMMON_FADT
+ select ACPI_SATA_GENERATOR
config EHCI_BAR
hex
diff --git a/src/southbridge/intel/ibexpeak/sata.c b/src/southbridge/intel/ibexpeak/sata.c
index 29d9240d07..670082062d 100644
--- a/src/southbridge/intel/ibexpeak/sata.c
+++ b/src/southbridge/intel/ibexpeak/sata.c
@@ -26,6 +26,7 @@
#include <device/pci_ids.h>
#include "pch.h"
#include <pc80/mc146818rtc.h>
+#include <acpi/sata.h>
typedef struct southbridge_intel_ibexpeak_config config_t;
@@ -249,6 +250,12 @@ static void sata_set_subsystem(device_t dev, unsigned vendor, unsigned device)
}
}
+static void sata_fill_ssdt(device_t dev)
+{
+ config_t *config = dev->chip_info;
+ generate_sata_ssdt_ports("\\_SB_.PCI0.SATA", config->sata_port_map);
+}
+
static struct pci_operations sata_pci_ops = {
.set_subsystem = sata_set_subsystem,
};
@@ -259,6 +266,7 @@ static struct device_operations sata_ops = {
.enable_resources = pci_dev_enable_resources,
.init = sata_init,
.enable = sata_enable,
+ .acpi_fill_ssdt_generator = sata_fill_ssdt,
.scan_bus = 0,
.ops_pci = &sata_pci_ops,
};