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-rw-r--r--src/southbridge/intel/i82801jx/acpi/ich10.asl2
-rw-r--r--src/southbridge/intel/i82801jx/smihandler.c2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/southbridge/intel/i82801jx/acpi/ich10.asl b/src/southbridge/intel/i82801jx/acpi/ich10.asl
index da8b789baa..985e8b657a 100644
--- a/src/southbridge/intel/i82801jx/acpi/ich10.asl
+++ b/src/southbridge/intel/i82801jx/acpi/ich10.asl
@@ -132,7 +132,7 @@ Scope(\)
Offset(0x1000), // Chipset
Offset(0x3000), // Legacy Configuration Registers
Offset(0x3404), // High Performance Timer Configuration
- HPAS, 2, // Address Select
+ HPAS, 2, // Address Select
, 5,
HPTE, 1, // Address Enable
Offset(0x3418), // FD (Function Disable)
diff --git a/src/southbridge/intel/i82801jx/smihandler.c b/src/southbridge/intel/i82801jx/smihandler.c
index 35e79c6064..f4382d74f1 100644
--- a/src/southbridge/intel/i82801jx/smihandler.c
+++ b/src/southbridge/intel/i82801jx/smihandler.c
@@ -402,7 +402,7 @@ static void southbridge_smi_monitor(unsigned int node, smm_state_save_area_t *st
data = RCBA32(0x1e18);
data &= mask;
// if (smi1)
- // southbridge_smi_command(data);
+ // southbridge_smi_command(data);
// return;
}
// Fall through to debug