diff options
Diffstat (limited to 'src/southbridge/intel/i82801jx/early_smbus.c')
| -rw-r--r-- | src/southbridge/intel/i82801jx/early_smbus.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/src/southbridge/intel/i82801jx/early_smbus.c b/src/southbridge/intel/i82801jx/early_smbus.c index 594400f710..8e3329cd71 100644 --- a/src/southbridge/intel/i82801jx/early_smbus.c +++ b/src/southbridge/intel/i82801jx/early_smbus.c @@ -16,21 +16,23 @@ */ #include <device/pci_ops.h> -#include <console/console.h> #include <device/pci_def.h> #include <device/smbus_host.h> #include "i82801jx.h" -void enable_smbus(void) +uintptr_t smbus_base(void) { - pci_devfn_t dev; + return SMBUS_IO_BASE; +} +int smbus_enable_iobar(uintptr_t base) +{ /* Set the SMBus device statically. */ - dev = PCI_DEV(0x0, 0x1f, 0x3); + pci_devfn_t dev = PCI_DEV(0x0, 0x1f, 0x3); /* Set SMBus I/O base. */ pci_write_config32(dev, SMB_BASE, - SMBUS_IO_BASE | PCI_BASE_ADDRESS_SPACE_IO); + base | PCI_BASE_ADDRESS_SPACE_IO); /* Set SMBus enable. */ pci_write_config8(dev, HOSTC, HST_EN); @@ -38,9 +40,7 @@ void enable_smbus(void) /* Set SMBus I/O space enable. */ pci_write_config16(dev, PCI_COMMAND, PCI_COMMAND_IO); - smbus_host_reset(SMBUS_IO_BASE); - - printk(BIOS_DEBUG, "SMBus controller enabled.\n"); + return 0; } int smbus_read_byte(unsigned int device, unsigned int address) |