diff options
Diffstat (limited to 'src/southbridge/intel/i82801ix')
| -rw-r--r-- | src/southbridge/intel/i82801ix/early_init.c | 2 | ||||
| -rw-r--r-- | src/southbridge/intel/i82801ix/i82801ix.h | 1 |
2 files changed, 1 insertions, 2 deletions
diff --git a/src/southbridge/intel/i82801ix/early_init.c b/src/southbridge/intel/i82801ix/early_init.c index c40f9b73ea..f7e2fd2621 100644 --- a/src/southbridge/intel/i82801ix/early_init.c +++ b/src/southbridge/intel/i82801ix/early_init.c @@ -22,7 +22,7 @@ void i82801ix_early_init(void) const pci_devfn_t d31f0 = PCI_DEV(0, 0x1f, 0); /* Set up RCBA. */ - pci_write_config32(d31f0, D31F0_RCBA, (uintptr_t)DEFAULT_RCBA | 1); + pci_write_config32(d31f0, RCBA, (uintptr_t)DEFAULT_RCBA | 1); /* Set up PMBASE. */ pci_write_config32(d31f0, D31F0_PMBASE, DEFAULT_PMBASE | 1); diff --git a/src/southbridge/intel/i82801ix/i82801ix.h b/src/southbridge/intel/i82801ix/i82801ix.h index f094ed8920..ddecc0cd71 100644 --- a/src/southbridge/intel/i82801ix/i82801ix.h +++ b/src/southbridge/intel/i82801ix/i82801ix.h @@ -111,7 +111,6 @@ #define D31F0_CxSTATE_CNF 0xa9 #define D31F0_C4TIMING_CNT 0xaa #define D31F0_GPIO_ROUT 0xb8 -#define D31F0_RCBA 0xf0 /* GEN_PMCON_3 bits */ #define RTC_BATTERY_DEAD (1 << 2) |