diff options
Diffstat (limited to 'src/southbridge/intel/i82801gx')
| -rw-r--r-- | src/southbridge/intel/i82801gx/Config.lb | 4 | ||||
| -rw-r--r-- | src/southbridge/intel/i82801gx/cmos_failover.c | 2 | ||||
| -rw-r--r-- | src/southbridge/intel/i82801gx/i82801gx_azalia.c | 4 | ||||
| -rw-r--r-- | src/southbridge/intel/i82801gx/i82801gx_lpc.c | 6 | ||||
| -rw-r--r-- | src/southbridge/intel/i82801gx/i82801gx_pci.c | 8 | ||||
| -rw-r--r-- | src/southbridge/intel/i82801gx/i82801gx_pcie.c | 2 |
6 files changed, 13 insertions, 13 deletions
diff --git a/src/southbridge/intel/i82801gx/Config.lb b/src/southbridge/intel/i82801gx/Config.lb index 53186ed293..9ef5f435e8 100644 --- a/src/southbridge/intel/i82801gx/Config.lb +++ b/src/southbridge/intel/i82801gx/Config.lb @@ -17,7 +17,7 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## -uses HAVE_SMI_HANDLER +uses CONFIG_HAVE_SMI_HANDLER config chip.h driver i82801gx.o @@ -36,7 +36,7 @@ driver i82801gx_usb_ehci.o object i82801gx_reset.o object i82801gx_watchdog.o -if HAVE_SMI_HANDLER +if CONFIG_HAVE_SMI_HANDLER object i82801gx_smi.o smmobject i82801gx_smihandler.o end diff --git a/src/southbridge/intel/i82801gx/cmos_failover.c b/src/southbridge/intel/i82801gx/cmos_failover.c index 0765404ceb..9eae0cbae7 100644 --- a/src/southbridge/intel/i82801gx/cmos_failover.c +++ b/src/southbridge/intel/i82801gx/cmos_failover.c @@ -31,7 +31,7 @@ static void check_cmos_failed(void) // clear bit 1 and bit 2 byte = cmos_read(RTC_BOOT_BYTE); byte &= 0x0c; - byte |= MAX_REBOOT_CNT << 4; + byte |= CONFIG_MAX_REBOOT_CNT << 4; cmos_write(byte, RTC_BOOT_BYTE); } } diff --git a/src/southbridge/intel/i82801gx/i82801gx_azalia.c b/src/southbridge/intel/i82801gx/i82801gx_azalia.c index fba46bae7c..d0f351413c 100644 --- a/src/southbridge/intel/i82801gx/i82801gx_azalia.c +++ b/src/southbridge/intel/i82801gx/i82801gx_azalia.c @@ -283,7 +283,7 @@ static void azalia_init(struct device *dev) u8 reg8; u32 reg32; -#if MMCONF_SUPPORT +#if CONFIG_MMCONF_SUPPORT // ESD reg32 = pci_mmio_read_config32(dev, 0x134); reg32 &= 0xff00ffff; @@ -314,7 +314,7 @@ static void azalia_init(struct device *dev) reg32 |= (0x80 << 0); // VCi map pci_mmio_write_config32(dev, 0x120, reg32); #else -#error ICH7 Azalia required MMCONF_SUPPORT +#error ICH7 Azalia required CONFIG_MMCONF_SUPPORT #endif /* Set Bus Master */ diff --git a/src/southbridge/intel/i82801gx/i82801gx_lpc.c b/src/southbridge/intel/i82801gx/i82801gx_lpc.c index 241d610bdd..636b975669 100644 --- a/src/southbridge/intel/i82801gx/i82801gx_lpc.c +++ b/src/southbridge/intel/i82801gx/i82801gx_lpc.c @@ -185,7 +185,7 @@ static void i82801gx_power_options(device_t dev) u8 reg8; u16 reg16; - int pwr_on=MAINBOARD_POWER_ON_AFTER_POWER_FAIL; + int pwr_on=CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL; int nmi_option; /* Which state do we want to goto after g3 (power restored)? @@ -296,7 +296,7 @@ static void enable_clock_gating(void) RCBA32(0x341c) = reg32; } -#if HAVE_SMI_HANDLER +#if CONFIG_HAVE_SMI_HANDLER static void i82801gx_lock_smm(struct device *dev) { void smm_lock(void); @@ -401,7 +401,7 @@ static void lpc_init(struct device *dev) setup_i8259(); -#if HAVE_SMI_HANDLER +#if CONFIG_HAVE_SMI_HANDLER i82801gx_lock_smm(dev); #endif diff --git a/src/southbridge/intel/i82801gx/i82801gx_pci.c b/src/southbridge/intel/i82801gx/i82801gx_pci.c index 2bf228b135..bf252ec37e 100644 --- a/src/southbridge/intel/i82801gx/i82801gx_pci.c +++ b/src/southbridge/intel/i82801gx/i82801gx_pci.c @@ -72,11 +72,11 @@ static void ich_pci_dev_enable_resources(struct device *dev) if (dev->on_mainboard && ops && ops->set_subsystem) { printk_debug("%s subsystem <- %02x/%02x\n", dev_path(dev), - MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID, - MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID); + CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID, + CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID); ops->set_subsystem(dev, - MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID, - MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID); + CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID, + CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID); } command = pci_read_config16(dev, PCI_COMMAND); diff --git a/src/southbridge/intel/i82801gx/i82801gx_pcie.c b/src/southbridge/intel/i82801gx/i82801gx_pcie.c index 6965b30972..d7655c5ea5 100644 --- a/src/southbridge/intel/i82801gx/i82801gx_pcie.c +++ b/src/southbridge/intel/i82801gx/i82801gx_pcie.c @@ -55,7 +55,7 @@ static void pci_init(struct device *dev) reg32 |= (1 << 3) | (1 << 2) | (1 << 1) | (1 << 0); pci_write_config32(dev, 0xe1, reg32); -#if MMCONF_SUPPORT +#if CONFIG_MMCONF_SUPPORT /* Set VC0 transaction class */ reg32 = pci_mmio_read_config32(dev, 0x114); reg32 &= 0xffffff00; |