aboutsummaryrefslogtreecommitdiff
path: root/src/southbridge/intel/i82801gx/smi.c
diff options
context:
space:
mode:
Diffstat (limited to 'src/southbridge/intel/i82801gx/smi.c')
-rw-r--r--src/southbridge/intel/i82801gx/smi.c257
1 files changed, 1 insertions, 256 deletions
diff --git a/src/southbridge/intel/i82801gx/smi.c b/src/southbridge/intel/i82801gx/smi.c
index 8cfd511ae4..5618db7840 100644
--- a/src/southbridge/intel/i82801gx/smi.c
+++ b/src/southbridge/intel/i82801gx/smi.c
@@ -23,6 +23,7 @@
#include <cpu/x86/cache.h>
#include <cpu/x86/smm.h>
#include <string.h>
+#include <southbridge/intel/common/pmutil.h>
#include "i82801gx.h"
/* I945 */
@@ -38,253 +39,6 @@
*/
static u16 pmbase = DEFAULT_PMBASE;
-/**
- * @brief read and clear PM1_STS
- * @return PM1_STS register
- */
-static u16 reset_pm1_status(void)
-{
- u16 reg16;
-
- reg16 = inw(pmbase + PM1_STS);
- /* set status bits are cleared by writing 1 to them */
- outw(reg16, pmbase + PM1_STS);
-
- return reg16;
-}
-
-static void dump_pm1_status(u16 pm1_sts)
-{
- printk(BIOS_DEBUG, "PM1_STS: ");
- if (pm1_sts & (1 << 15))
- printk(BIOS_DEBUG, "WAK ");
- if (pm1_sts & (1 << 14))
- printk(BIOS_DEBUG, "PCIEXPWAK ");
- if (pm1_sts & (1 << 11))
- printk(BIOS_DEBUG, "PRBTNOR ");
- if (pm1_sts & (1 << 10))
- printk(BIOS_DEBUG, "RTC ");
- if (pm1_sts & (1 << 8))
- printk(BIOS_DEBUG, "PWRBTN ");
- if (pm1_sts & (1 << 5))
- printk(BIOS_DEBUG, "GBL ");
- if (pm1_sts & (1 << 4))
- printk(BIOS_DEBUG, "BM ");
- if (pm1_sts & (1 << 0))
- printk(BIOS_DEBUG, "TMROF ");
- printk(BIOS_DEBUG, "\n");
-}
-
-/**
- * @brief read and clear SMI_STS
- * @return SMI_STS register
- */
-static u32 reset_smi_status(void)
-{
- u32 reg32;
-
- reg32 = inl(pmbase + SMI_STS);
- /* set status bits are cleared by writing 1 to them */
- outl(reg32, pmbase + SMI_STS);
-
- return reg32;
-}
-
-static void dump_smi_status(u32 smi_sts)
-{
- printk(BIOS_DEBUG, "SMI_STS: ");
- if (smi_sts & (1 << 26))
- printk(BIOS_DEBUG, "SPI ");
- if (smi_sts & (1 << 25))
- printk(BIOS_DEBUG, "EL_SMI ");
- if (smi_sts & (1 << 21))
- printk(BIOS_DEBUG, "MONITOR ");
- if (smi_sts & (1 << 20))
- printk(BIOS_DEBUG, "PCI_EXP_SMI ");
- if (smi_sts & (1 << 18))
- printk(BIOS_DEBUG, "INTEL_USB2 ");
- if (smi_sts & (1 << 17))
- printk(BIOS_DEBUG, "LEGACY_USB2 ");
- if (smi_sts & (1 << 16))
- printk(BIOS_DEBUG, "SMBUS_SMI ");
- if (smi_sts & (1 << 15))
- printk(BIOS_DEBUG, "SERIRQ_SMI ");
- if (smi_sts & (1 << 14))
- printk(BIOS_DEBUG, "PERIODIC ");
- if (smi_sts & (1 << 13))
- printk(BIOS_DEBUG, "TCO ");
- if (smi_sts & (1 << 12))
- printk(BIOS_DEBUG, "DEVMON ");
- if (smi_sts & (1 << 11))
- printk(BIOS_DEBUG, "MCSMI ");
- if (smi_sts & (1 << 10))
- printk(BIOS_DEBUG, "GPI ");
- if (smi_sts & (1 << 9))
- printk(BIOS_DEBUG, "GPE0 ");
- if (smi_sts & (1 << 8))
- printk(BIOS_DEBUG, "PM1 ");
- if (smi_sts & (1 << 6))
- printk(BIOS_DEBUG, "SWSMI_TMR ");
- if (smi_sts & (1 << 5))
- printk(BIOS_DEBUG, "APM ");
- if (smi_sts & (1 << 4))
- printk(BIOS_DEBUG, "SLP_SMI ");
- if (smi_sts & (1 << 3))
- printk(BIOS_DEBUG, "LEGACY_USB ");
- if (smi_sts & (1 << 2))
- printk(BIOS_DEBUG, "BIOS ");
- printk(BIOS_DEBUG, "\n");
-}
-
-
-/**
- * @brief read and clear GPE0_STS
- * @return GPE0_STS register
- */
-static u32 reset_gpe0_status(void)
-{
- u32 reg32;
-
- reg32 = inl(pmbase + GPE0_STS);
- /* set status bits are cleared by writing 1 to them */
- outl(reg32, pmbase + GPE0_STS);
-
- return reg32;
-}
-
-static void dump_gpe0_status(u32 gpe0_sts)
-{
- int i;
- printk(BIOS_DEBUG, "GPE0_STS: ");
- for (i = 31; i >= 16; i--) {
- if (gpe0_sts & (1 << i))
- printk(BIOS_DEBUG, "GPIO%d ", (i-16));
- }
- if (gpe0_sts & (1 << 14))
- printk(BIOS_DEBUG, "USB4 ");
- if (gpe0_sts & (1 << 13))
- printk(BIOS_DEBUG, "PME_B0 ");
- if (gpe0_sts & (1 << 12))
- printk(BIOS_DEBUG, "USB3 ");
- if (gpe0_sts & (1 << 11))
- printk(BIOS_DEBUG, "PME ");
- if (gpe0_sts & (1 << 10))
- printk(BIOS_DEBUG, "EL_SCI/BATLOW ");
- if (gpe0_sts & (1 << 9))
- printk(BIOS_DEBUG, "PCI_EXP ");
- if (gpe0_sts & (1 << 8))
- printk(BIOS_DEBUG, "RI ");
- if (gpe0_sts & (1 << 7))
- printk(BIOS_DEBUG, "SMB_WAK ");
- if (gpe0_sts & (1 << 6))
- printk(BIOS_DEBUG, "TCO_SCI ");
- if (gpe0_sts & (1 << 5))
- printk(BIOS_DEBUG, "AC97 ");
- if (gpe0_sts & (1 << 4))
- printk(BIOS_DEBUG, "USB2 ");
- if (gpe0_sts & (1 << 3))
- printk(BIOS_DEBUG, "USB1 ");
- if (gpe0_sts & (1 << 2))
- printk(BIOS_DEBUG, "HOT_PLUG ");
- if (gpe0_sts & (1 << 0))
- printk(BIOS_DEBUG, "THRM ");
- printk(BIOS_DEBUG, "\n");
-}
-
-
-/**
- * @brief read and clear ALT_GP_SMI_STS
- * @return ALT_GP_SMI_STS register
- */
-static u16 reset_alt_gp_smi_status(void)
-{
- u16 reg16;
-
- reg16 = inl(pmbase + ALT_GP_SMI_STS);
- /* set status bits are cleared by writing 1 to them */
- outl(reg16, pmbase + ALT_GP_SMI_STS);
-
- return reg16;
-}
-
-static void dump_alt_gp_smi_status(u16 alt_gp_smi_sts)
-{
- int i;
- printk(BIOS_DEBUG, "ALT_GP_SMI_STS: ");
- for (i = 15; i >= 0; i--) {
- if (alt_gp_smi_sts & (1 << i))
- printk(BIOS_DEBUG, "GPI%d ", i);
- }
- printk(BIOS_DEBUG, "\n");
-}
-
-
-
-/**
- * @brief read and clear TCOx_STS
- * @return TCOx_STS registers
- */
-static u32 reset_tco_status(void)
-{
- u32 tcobase = pmbase + 0x60;
- u32 reg32;
-
- reg32 = inl(tcobase + 0x04);
- /* set status bits are cleared by writing 1 to them */
- outl(reg32 & ~(1 << 18), tcobase + 0x04); // Don't clear BOOT_STS before SECOND_TO_STS
- if (reg32 & (1 << 18))
- outl(reg32 & (1 << 18), tcobase + 0x04); // clear BOOT_STS
-
- return reg32;
-}
-
-
-static void dump_tco_status(u32 tco_sts)
-{
- printk(BIOS_DEBUG, "TCO_STS: ");
- if (tco_sts & (1 << 20))
- printk(BIOS_DEBUG, "SMLINK_SLV ");
- if (tco_sts & (1 << 18))
- printk(BIOS_DEBUG, "BOOT ");
- if (tco_sts & (1 << 17))
- printk(BIOS_DEBUG, "SECOND_TO ");
- if (tco_sts & (1 << 16))
- printk(BIOS_DEBUG, "INTRD_DET ");
- if (tco_sts & (1 << 12))
- printk(BIOS_DEBUG, "DMISERR ");
- if (tco_sts & (1 << 10))
- printk(BIOS_DEBUG, "DMISMI ");
- if (tco_sts & (1 << 9))
- printk(BIOS_DEBUG, "DMISCI ");
- if (tco_sts & (1 << 8))
- printk(BIOS_DEBUG, "BIOSWR ");
- if (tco_sts & (1 << 7))
- printk(BIOS_DEBUG, "NEWCENTURY ");
- if (tco_sts & (1 << 3))
- printk(BIOS_DEBUG, "TIMEOUT ");
- if (tco_sts & (1 << 2))
- printk(BIOS_DEBUG, "TCO_INT ");
- if (tco_sts & (1 << 1))
- printk(BIOS_DEBUG, "SW_TCO ");
- if (tco_sts & (1 << 0))
- printk(BIOS_DEBUG, "NMI2SMI ");
- printk(BIOS_DEBUG, "\n");
-}
-
-
-
-/**
- * @brief Set the EOS bit
- */
-static void smi_set_eos(void)
-{
- u8 reg8;
-
- reg8 = inb(pmbase + SMI_EN);
- reg8 |= EOS;
- outb(reg8, pmbase + SMI_EN);
-}
-
extern uint8_t smm_relocation_start, smm_relocation_end;
static void *default_smm_area = NULL;
@@ -429,12 +183,3 @@ void smm_lock(void)
pci_write_config8(dev_find_slot(0, PCI_DEVFN(0, 0)), SMRAM,
D_LCK | G_SMRAME | C_BASE_SEG);
}
-
-void smm_setup_structures(void *gnvs, void *tcg, void *smi1)
-{
- /* The GDT or coreboot table is going to live here. But a long time
- * after we relocated the GNVS, so this is not troublesome.
- */
- *(u32 *)0x500 = (u32)gnvs;
- outb(0xea, 0xb2);
-}
generated by cgit v1.2.3 (git 2.39.1) at 2024-07-03 03:29:59 +0000