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Diffstat (limited to 'src/southbridge/intel/i82801gx/ide.c')
-rw-r--r--src/southbridge/intel/i82801gx/ide.c16
1 files changed, 8 insertions, 8 deletions
diff --git a/src/southbridge/intel/i82801gx/ide.c b/src/southbridge/intel/i82801gx/ide.c
index f1ccd0f295..5c4c96d8c8 100644
--- a/src/southbridge/intel/i82801gx/ide.c
+++ b/src/southbridge/intel/i82801gx/ide.c
@@ -40,10 +40,10 @@ static void ide_init(struct device *dev)
if (enable_primary) {
/* Enable primary IDE interface. */
ideTimingConfig |= IDE_DECODE_ENABLE;
- ideTimingConfig |= (2 << 12); // ISP = 3 clocks
- ideTimingConfig |= (3 << 8); // RCT = 1 clock
- ideTimingConfig |= (1 << 1); // IE0
- ideTimingConfig |= (1 << 0); // TIME0
+ ideTimingConfig |= IDE_ISP_3_CLOCKS;
+ ideTimingConfig |= IDE_RCT_1_CLOCKS;
+ ideTimingConfig |= IDE_IE0;
+ ideTimingConfig |= IDE_TIME0; // TIME0
printk(BIOS_DEBUG, " IDE0");
}
pci_write_config16(dev, IDE_TIM_PRI, ideTimingConfig);
@@ -54,10 +54,10 @@ static void ide_init(struct device *dev)
if (enable_secondary) {
/* Enable secondary IDE interface. */
ideTimingConfig |= IDE_DECODE_ENABLE;
- ideTimingConfig |= (2 << 12); // ISP = 3 clocks
- ideTimingConfig |= (3 << 8); // RCT = 1 clock
- ideTimingConfig |= (1 << 1); // IE0
- ideTimingConfig |= (1 << 0); // TIME0
+ ideTimingConfig |= IDE_ISP_3_CLOCKS;
+ ideTimingConfig |= IDE_RCT_1_CLOCKS;
+ ideTimingConfig |= IDE_IE0;
+ ideTimingConfig |= IDE_TIME0;
printk(BIOS_DEBUG, " IDE1");
}
pci_write_config16(dev, IDE_TIM_SEC, ideTimingConfig);