diff options
Diffstat (limited to 'src/southbridge/intel/i82801gx/early_lpc.c')
| -rw-r--r-- | src/southbridge/intel/i82801gx/early_lpc.c | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/src/southbridge/intel/i82801gx/early_lpc.c b/src/southbridge/intel/i82801gx/early_lpc.c new file mode 100644 index 0000000000..9f80d41aa4 --- /dev/null +++ b/src/southbridge/intel/i82801gx/early_lpc.c @@ -0,0 +1,33 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2008-2009 coresystems GmbH + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <arch/io.h> +#include <timestamp.h> + +#if CONFIG_COLLECT_TIMESTAMPS +tsc_t get_initial_timestamp(void) +{ + tsc_t base_time = { + .lo = pci_read_config32(PCI_DEV(0, 0x00, 0), 0xdc), + .hi = pci_read_config32(PCI_DEV(0, 0x1f, 2), 0xd0) + }; + return base_time; +} +#endif |