diff options
Diffstat (limited to 'src/southbridge/intel/i82801gx/chip.h')
| -rw-r--r-- | src/southbridge/intel/i82801gx/chip.h | 41 |
1 files changed, 35 insertions, 6 deletions
diff --git a/src/southbridge/intel/i82801gx/chip.h b/src/southbridge/intel/i82801gx/chip.h index 45c011a1c0..7fca7ca9f3 100644 --- a/src/southbridge/intel/i82801gx/chip.h +++ b/src/southbridge/intel/i82801gx/chip.h @@ -3,10 +3,10 @@ * * Copyright (C) 2008-2009 coresystems GmbH * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of + * the License. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of @@ -22,7 +22,10 @@ #define SOUTHBRIDGE_INTEL_I82801GX_CHIP_H struct southbridge_intel_i82801gx_config { - /* LPC configuration */ + /** + * Interrupt Routing configuration + * If bit7 is 1, the interrupt is disabled. + */ uint8_t pirqa_routing; uint8_t pirqb_routing; uint8_t pirqc_routing; @@ -32,6 +35,32 @@ struct southbridge_intel_i82801gx_config { uint8_t pirqg_routing; uint8_t pirqh_routing; + /** + * GPI Routing configuration + * + * Only the lower two bits have a meaning: + * 00: No effect + * 01: SMI# (if corresponding ALT_GPI_SMI_EN bit is also set) + * 10: SCI (if corresponding GPIO_EN bit is also set) + * 11: reserved + */ + uint8_t gpi0_routing; + uint8_t gpi1_routing; + uint8_t gpi2_routing; + uint8_t gpi3_routing; + uint8_t gpi4_routing; + uint8_t gpi5_routing; + uint8_t gpi6_routing; + uint8_t gpi7_routing; + uint8_t gpi8_routing; + uint8_t gpi9_routing; + uint8_t gpi10_routing; + uint8_t gpi11_routing; + uint8_t gpi12_routing; + uint8_t gpi13_routing; + uint8_t gpi14_routing; + uint8_t gpi15_routing; + /* IDE configuration */ uint32_t ide_legacy_combined; uint32_t ide_enable_primary; @@ -39,7 +68,7 @@ struct southbridge_intel_i82801gx_config { uint32_t sata_ahci; /* Azalia Configuration */ - unsigned long hda_viddid; + uint32_t hda_viddid; }; extern struct chip_operations southbridge_intel_i82801gx_ops; |