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Diffstat (limited to 'src/southbridge/intel/i82801ex')
-rw-r--r--src/southbridge/intel/i82801ex/i82801ex_early_smbus.c6
-rw-r--r--src/southbridge/intel/i82801ex/i82801ex_watchdog.c2
2 files changed, 4 insertions, 4 deletions
diff --git a/src/southbridge/intel/i82801ex/i82801ex_early_smbus.c b/src/southbridge/intel/i82801ex/i82801ex_early_smbus.c
index c86bf23bb7..0ad5c74ee0 100644
--- a/src/southbridge/intel/i82801ex/i82801ex_early_smbus.c
+++ b/src/southbridge/intel/i82801ex/i82801ex_early_smbus.c
@@ -6,7 +6,7 @@ static void enable_smbus(void)
{
device_t dev = PCI_DEV(0x0, 0x1f, 0x3);
- print_spew("SMBus controller enabled\r\n");
+ print_spew("SMBus controller enabled\n");
pci_write_config32(dev, 0x20, SMBUS_IO_BASE | 1);
print_debug_hex32(pci_read_config32(dev, 0x20));
@@ -35,7 +35,7 @@ static void smbus_write_byte(unsigned device, unsigned address, unsigned char va
return;
}
- print_debug("Unimplemented smbus_write_byte() called.\r\n");
+ print_debug("Unimplemented smbus_write_byte() called.\n");
#if 0
/* setup transaction */
@@ -125,7 +125,7 @@ static int smbus_write_block(unsigned device, unsigned length, unsigned cmd,
SMBUS_IO_BASE + SMBHSTSTAT);
}
- print_debug("SMBUS Block complete\r\n");
+ print_debug("SMBUS Block complete\n");
return 0;
}
diff --git a/src/southbridge/intel/i82801ex/i82801ex_watchdog.c b/src/southbridge/intel/i82801ex/i82801ex_watchdog.c
index 205ea87d94..26f6644763 100644
--- a/src/southbridge/intel/i82801ex/i82801ex_watchdog.c
+++ b/src/southbridge/intel/i82801ex/i82801ex_watchdog.c
@@ -24,6 +24,6 @@ void watchdog_off(void)
/* Clear TCO timeout status */
outw(0x0008, base + 0x04);
outw(0x0002, base + 0x06);
- printk(BIOS_DEBUG, "Watchdog ICH5 disabled\r\n");
+ printk(BIOS_DEBUG, "Watchdog ICH5 disabled\n");
}