diff options
Diffstat (limited to 'src/southbridge/intel/i82801dx/early_smbus.c')
| -rw-r--r-- | src/southbridge/intel/i82801dx/early_smbus.c | 15 |
1 files changed, 8 insertions, 7 deletions
diff --git a/src/southbridge/intel/i82801dx/early_smbus.c b/src/southbridge/intel/i82801dx/early_smbus.c index de0bc93978..5ab7f8d211 100644 --- a/src/southbridge/intel/i82801dx/early_smbus.c +++ b/src/southbridge/intel/i82801dx/early_smbus.c @@ -16,9 +16,7 @@ #include <device/pci_ops.h> #include <device/pci_def.h> -#include <console/console.h> #include <device/smbus_host.h> - #include "i82801dx.h" void i82801dx_early_init(void) @@ -26,20 +24,23 @@ void i82801dx_early_init(void) enable_smbus(); } -void enable_smbus(void) +uintptr_t smbus_base(void) +{ + return SMBUS_IO_BASE; +} + +int smbus_enable_iobar(uintptr_t base) { pci_devfn_t dev = PCI_DEV(0x0, 0x1f, 0x3); /* set smbus iobase */ - pci_write_config32(dev, 0x20, SMBUS_IO_BASE | 1); + pci_write_config32(dev, 0x20, base | 1); /* Set smbus enable */ pci_write_config8(dev, 0x40, 0x01); /* Set smbus iospace enable */ pci_write_config16(dev, 0x4, 0x01); - smbus_host_reset(SMBUS_IO_BASE); - - printk(BIOS_DEBUG, "SMBus controller enabled\n"); + return 0; } int smbus_read_byte(unsigned int device, unsigned int address) |