diff options
Diffstat (limited to 'src/southbridge/intel/i82801bx/i82801bx_lpc.c')
| -rw-r--r-- | src/southbridge/intel/i82801bx/i82801bx_lpc.c | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/src/southbridge/intel/i82801bx/i82801bx_lpc.c b/src/southbridge/intel/i82801bx/i82801bx_lpc.c index 9432d2e788..c379428c86 100644 --- a/src/southbridge/intel/i82801bx/i82801bx_lpc.c +++ b/src/southbridge/intel/i82801bx/i82801bx_lpc.c @@ -28,6 +28,7 @@ #include <pc80/mc146818rtc.h> #include <pc80/isa-dma.h> #include <arch/io.h> +#include <arch/ioapic.h> #include "i82801bx.h" #define NMI_OFF 0 @@ -74,8 +75,8 @@ typedef struct southbridge_intel_i82801bx_config config_t; static void i82801bx_enable_apic(struct device *dev) { uint32_t reg32; - volatile uint32_t *ioapic_index = (volatile uint32_t *)0xfec00000; - volatile uint32_t *ioapic_data = (volatile uint32_t *)0xfec00010; + volatile uint32_t *ioapic_index = (volatile uint32_t *)IO_APIC_ADDR; + volatile uint32_t *ioapic_data = (volatile uint32_t *)(IO_APIC_ADDR + 0x10); /* Set ACPI base address (I/O space). */ pci_write_config32(dev, PMBASE, (PMBASE_ADDR | 1)); @@ -284,7 +285,7 @@ static void i82801bx_lpc_read_resources(device_t dev) IORESOURCE_ASSIGNED | IORESOURCE_FIXED; res = new_resource(dev, 3); /* IOAPIC */ - res->base = 0xfec00000; + res->base = IO_APIC_ADDR; res->size = 0x00001000; res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; } |