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Diffstat (limited to 'src/southbridge/intel/fsp_rangeley')
-rw-r--r--src/southbridge/intel/fsp_rangeley/soc.c4
-rw-r--r--src/southbridge/intel/fsp_rangeley/spi.c5
-rw-r--r--src/southbridge/intel/fsp_rangeley/watchdog.c2
3 files changed, 5 insertions, 6 deletions
diff --git a/src/southbridge/intel/fsp_rangeley/soc.c b/src/southbridge/intel/fsp_rangeley/soc.c
index 13b64c4e7f..fd83342ac7 100644
--- a/src/southbridge/intel/fsp_rangeley/soc.c
+++ b/src/southbridge/intel/fsp_rangeley/soc.c
@@ -29,7 +29,7 @@ int soc_silicon_revision(void)
{
if (soc_revision_id < 0)
soc_revision_id = pci_read_config8(
- dev_find_slot(0, PCI_DEVFN(0x1f, 0)),
+ pcidev_on_root(0x1f, 0),
PCI_REVISION_ID);
return soc_revision_id;
}
@@ -38,7 +38,7 @@ int soc_silicon_type(void)
{
if (soc_type < 0)
soc_type = pci_read_config8(
- dev_find_slot(0, PCI_DEVFN(0x1f, 0)),
+ pcidev_on_root(0x1f, 0),
PCI_DEVICE_ID + 1);
return soc_type;
}
diff --git a/src/southbridge/intel/fsp_rangeley/spi.c b/src/southbridge/intel/fsp_rangeley/spi.c
index 97548069ad..1571925027 100644
--- a/src/southbridge/intel/fsp_rangeley/spi.c
+++ b/src/southbridge/intel/fsp_rangeley/spi.c
@@ -341,14 +341,13 @@ void spi_init(void)
{
int ich_version = 0;
uint8_t bios_cntl;
- struct device *dev;
uint32_t ids;
uint16_t vendor_id, device_id;
#ifdef __SMM__
- dev = PCI_DEV(0, 31, 0);
+ pci_devfn_t dev = PCI_DEV(0, 31, 0);
#else
- dev = dev_find_slot(0, PCI_DEVFN(31, 0));
+ struct device *dev = pcidev_on_root(31, 0);
#endif
pci_read_config_dword(dev, 0, &ids);
vendor_id = ids;
diff --git a/src/southbridge/intel/fsp_rangeley/watchdog.c b/src/southbridge/intel/fsp_rangeley/watchdog.c
index ff1c571505..d7d3141e59 100644
--- a/src/southbridge/intel/fsp_rangeley/watchdog.c
+++ b/src/southbridge/intel/fsp_rangeley/watchdog.c
@@ -29,7 +29,7 @@ void watchdog_off(void)
u32 value, abase;
/* Turn off the watchdog. */
- dev = dev_find_slot(0, PCI_DEVFN(0x1f, 0));
+ dev = pcidev_on_root(0x1f, 0);
/* Enable I/O space. */
value = pci_read_config16(dev, 0x04);