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Diffstat (limited to 'src/southbridge/intel/fsp_rangeley')
-rw-r--r--src/southbridge/intel/fsp_rangeley/romstage.c4
1 files changed, 0 insertions, 4 deletions
diff --git a/src/southbridge/intel/fsp_rangeley/romstage.c b/src/southbridge/intel/fsp_rangeley/romstage.c
index fd8b3b20b0..6c5751e272 100644
--- a/src/southbridge/intel/fsp_rangeley/romstage.c
+++ b/src/southbridge/intel/fsp_rangeley/romstage.c
@@ -136,10 +136,6 @@ void romstage_main_continue(EFI_STATUS status, void *hob_list_ptr) {
timestamp_add_now(TS_END_ROMSTAGE);
#endif
-#if IS_ENABLED(CONFIG_CONSOLE_CBMEM)
- printk(BIOS_DEBUG, "cbmemc_reinit\n");
- cbmemc_reinit();
-#endif
post_code(0x4f);
/* Load the ramstage. */