diff options
Diffstat (limited to 'src/southbridge/intel/fsp_rangeley/soc.h')
| -rw-r--r-- | src/southbridge/intel/fsp_rangeley/soc.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/southbridge/intel/fsp_rangeley/soc.h b/src/southbridge/intel/fsp_rangeley/soc.h index 6db4b11da3..f1b1781afc 100644 --- a/src/southbridge/intel/fsp_rangeley/soc.h +++ b/src/southbridge/intel/fsp_rangeley/soc.h @@ -43,7 +43,11 @@ /* Southbridge internal device MEM BARs (Set to match FSP settings) */ #define DEFAULT_IBASE 0xfed08000 #define DEFAULT_PBASE 0xfed03000 +#ifndef __ACPI__ +#define DEFAULT_RCBA ((u8 *)0xfed1c000) +#else #define DEFAULT_RCBA 0xfed1c000 +#endif #ifndef __ACPI__ #define DEBUG_PERIODIC_SMIS 0 |