diff options
Diffstat (limited to 'src/southbridge/intel/fsp_bd82x6x')
-rw-r--r-- | src/southbridge/intel/fsp_bd82x6x/Kconfig | 1 | ||||
-rw-r--r-- | src/southbridge/intel/fsp_bd82x6x/lpc.c | 12 |
2 files changed, 13 insertions, 0 deletions
diff --git a/src/southbridge/intel/fsp_bd82x6x/Kconfig b/src/southbridge/intel/fsp_bd82x6x/Kconfig index cebd96d69a..08400b354f 100644 --- a/src/southbridge/intel/fsp_bd82x6x/Kconfig +++ b/src/southbridge/intel/fsp_bd82x6x/Kconfig @@ -33,6 +33,7 @@ config SOUTH_BRIDGE_OPTIONS # dummy select HAVE_INTEL_FIRMWARE select SOUTHBRIDGE_INTEL_COMMON select SOUTHBRIDGE_INTEL_COMMON_SMBUS + select HAVE_INTEL_CHIPSET_LOCKDOWN config EHCI_BAR hex diff --git a/src/southbridge/intel/fsp_bd82x6x/lpc.c b/src/southbridge/intel/fsp_bd82x6x/lpc.c index 4a5bf68ad5..73366f73c1 100644 --- a/src/southbridge/intel/fsp_bd82x6x/lpc.c +++ b/src/southbridge/intel/fsp_bd82x6x/lpc.c @@ -739,6 +739,17 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) fadt->x_gpe1_blk.addrh = 0x0; } +static void lpc_final(struct device *dev) +{ + /* Call SMM finalize() handlers before resume */ + if (IS_ENABLED(CONFIG_HAVE_SMI_HANDLER)) { + if (IS_ENABLED(CONFIG_INTEL_CHIPSET_LOCKDOWN) || + acpi_is_wakeup_s3()) { + outb(APM_CNT_FINALIZE, APM_CNT); + } + } +} + static struct pci_operations pci_ops = { .set_subsystem = set_subsystem, }; @@ -750,6 +761,7 @@ static struct device_operations device_ops = { .write_acpi_tables = acpi_write_hpet, .acpi_inject_dsdt_generator = southbridge_inject_dsdt, .init = lpc_init, + .final = lpc_final, .enable = pch_lpc_enable, .scan_bus = scan_lpc_bus, .ops_pci = &pci_ops, |