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Diffstat (limited to 'src/southbridge/intel/esb6300/chip.h')
-rw-r--r--src/southbridge/intel/esb6300/chip.h30
1 files changed, 30 insertions, 0 deletions
diff --git a/src/southbridge/intel/esb6300/chip.h b/src/southbridge/intel/esb6300/chip.h
new file mode 100644
index 0000000000..ff74e615fd
--- /dev/null
+++ b/src/southbridge/intel/esb6300/chip.h
@@ -0,0 +1,30 @@
+struct southbridge_intel_esb6300_config
+{
+#define ESB6300_GPIO_USE_MASK 0x03
+#define ESB6300_GPIO_USE_DEFAULT 0x00
+#define ESB6300_GPIO_USE_AS_NATIVE 0x01
+#define ESB6300_GPIO_USE_AS_GPIO 0x02
+
+#define ESB6300_GPIO_SEL_MASK 0x0c
+#define ESB6300_GPIO_SEL_DEFAULT 0x00
+#define ESB6300_GPIO_SEL_OUTPUT 0x04
+#define ESB6300_GPIO_SEL_INPUT 0x08
+
+#define ESB6300_GPIO_LVL_MASK 0x30
+#define ESB6300_GPIO_LVL_DEFAULT 0x00
+#define ESB6300_GPIO_LVL_LOW 0x10
+#define ESB6300_GPIO_LVL_HIGH 0x20
+#define ESB6300_GPIO_LVL_BLINK 0x30
+
+#define ESB6300_GPIO_INV_MASK 0xc0
+#define ESB6300_GPIO_INV_DEFAULT 0x00
+#define ESB6300_GPIO_INV_OFF 0x40
+#define ESB6300_GPIO_INV_ON 0x80
+
+ /* GPIO use select */
+ unsigned char gpio[64];
+ unsigned int pirq_a_d;
+ unsigned int pirq_e_h;
+};
+extern struct chip_operations southbridge_intel_esb6300_ops;
+