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Diffstat (limited to 'src/southbridge/intel/common')
-rw-r--r--src/southbridge/intel/common/smihandler.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/southbridge/intel/common/smihandler.c b/src/southbridge/intel/common/smihandler.c
index 4279eb88d7..733c625f6c 100644
--- a/src/southbridge/intel/common/smihandler.c
+++ b/src/southbridge/intel/common/smihandler.c
@@ -374,7 +374,7 @@ static void southbridge_smi_tco(void)
if (tco_sts & (1 << 8)) { // BIOSWR
u8 bios_cntl;
- bios_cntl = pci_read_config16(PCI_DEV(0, 0x1f, 0), 0xdc);
+ bios_cntl = pci_read_config8(PCI_DEV(0, 0x1f, 0), 0xdc);
if (bios_cntl & 1) {
/* BWE is RW, so the SMI was caused by a
@@ -388,7 +388,7 @@ static void southbridge_smi_tco(void)
* box.
*/
printk(BIOS_DEBUG, "Switching back to RO\n");
- pci_write_config32(PCI_DEV(0, 0x1f, 0), 0xdc,
+ pci_write_config8(PCI_DEV(0, 0x1f, 0), 0xdc,
(bios_cntl & ~1));
} /* No else for now? */
} else if (tco_sts & (1 << 3)) { /* TIMEOUT */