diff options
Diffstat (limited to 'src/southbridge/intel/common')
| -rw-r--r-- | src/southbridge/intel/common/spi.c | 2 | ||||
| -rw-r--r-- | src/southbridge/intel/common/usb_debug.c | 4 |
2 files changed, 3 insertions, 3 deletions
diff --git a/src/southbridge/intel/common/spi.c b/src/southbridge/intel/common/spi.c index 4b9bd20b2d..a6a9ae55f0 100644 --- a/src/southbridge/intel/common/spi.c +++ b/src/southbridge/intel/common/spi.c @@ -188,7 +188,7 @@ enum { SPI_OPCODE_TYPE_WRITE_WITH_ADDRESS = 3 }; -#if CONFIG_DEBUG_SPI_FLASH +#if IS_ENABLED(CONFIG_DEBUG_SPI_FLASH) static u8 readb_(const void *addr) { diff --git a/src/southbridge/intel/common/usb_debug.c b/src/southbridge/intel/common/usb_debug.c index 23c732f52c..eeac6d92dc 100644 --- a/src/southbridge/intel/common/usb_debug.c +++ b/src/southbridge/intel/common/usb_debug.c @@ -27,7 +27,7 @@ pci_devfn_t pci_ehci_dbg_dev(unsigned int hcd_idx) u32 class; pci_devfn_t dev; -#if CONFIG_HAVE_USBDEBUG_OPTIONS +#if IS_ENABLED(CONFIG_HAVE_USBDEBUG_OPTIONS) if (hcd_idx==2) dev = PCI_DEV(0, 0x1a, 0); else @@ -37,7 +37,7 @@ pci_devfn_t pci_ehci_dbg_dev(unsigned int hcd_idx) #endif class = pci_read_config32(dev, PCI_CLASS_REVISION) >> 8; -#if CONFIG_HAVE_USBDEBUG_OPTIONS +#if IS_ENABLED(CONFIG_HAVE_USBDEBUG_OPTIONS) if (class != PCI_EHCI_CLASSCODE) { /* If we enter here before RCBA programming, EHCI function may * appear with the highest function number instead. |