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Diffstat (limited to 'src/southbridge/intel/common')
-rw-r--r--src/southbridge/intel/common/tco.h2
-rw-r--r--src/southbridge/intel/common/watchdog.c2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/southbridge/intel/common/tco.h b/src/southbridge/intel/common/tco.h
index 4c3f6391b4..168971e431 100644
--- a/src/southbridge/intel/common/tco.h
+++ b/src/southbridge/intel/common/tco.h
@@ -15,7 +15,7 @@
#define TCO1_STS 0x04
#define TCO1_TIMEOUT (1 << 3)
#define TCO2_STS 0x06
-#define SECOND_TO_STS (1 << 1)
+#define TCO2_STS_SECOND_TO (1 << 1)
#define TCO1_CNT 0x08
#define TCO_TMR_HLT (1 << 11)
diff --git a/src/southbridge/intel/common/watchdog.c b/src/southbridge/intel/common/watchdog.c
index b40c5fe3b3..a9886916ca 100644
--- a/src/southbridge/intel/common/watchdog.c
+++ b/src/southbridge/intel/common/watchdog.c
@@ -33,7 +33,7 @@ void watchdog_off(void)
/* Clear TCO timeout status. */
write_pmbase16(PMBASE_TCO_OFFSET + TCO1_STS, TCO1_TIMEOUT);
- write_pmbase16(PMBASE_TCO_OFFSET + TCO2_STS, SECOND_TO_STS);
+ write_pmbase16(PMBASE_TCO_OFFSET + TCO2_STS, TCO2_STS_SECOND_TO);
printk(BIOS_DEBUG, "ICH-NM10-PCH: watchdog disabled\n");
}