diff options
Diffstat (limited to 'src/southbridge/intel/bd82x6x')
-rw-r--r-- | src/southbridge/intel/bd82x6x/Kconfig | 1 | ||||
-rw-r--r-- | src/southbridge/intel/bd82x6x/azalia.c | 31 |
2 files changed, 3 insertions, 29 deletions
diff --git a/src/southbridge/intel/bd82x6x/Kconfig b/src/southbridge/intel/bd82x6x/Kconfig index 7852ace972..3b05a3e678 100644 --- a/src/southbridge/intel/bd82x6x/Kconfig +++ b/src/southbridge/intel/bd82x6x/Kconfig @@ -11,6 +11,7 @@ if SOUTHBRIDGE_INTEL_BD82X6X || SOUTHBRIDGE_INTEL_C216 config SOUTH_BRIDGE_OPTIONS # dummy def_bool y select ACPI_INTEL_HARDWARE_SLEEP_VALUES + select AZALIA_PLUGIN_SUPPORT select SOUTHBRIDGE_INTEL_COMMON_FINALIZE select SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ select SOUTHBRIDGE_INTEL_COMMON_SMBUS diff --git a/src/southbridge/intel/bd82x6x/azalia.c b/src/southbridge/intel/bd82x6x/azalia.c index 972b2531e2..5e810c4cc0 100644 --- a/src/southbridge/intel/bd82x6x/azalia.c +++ b/src/southbridge/intel/bd82x6x/azalia.c @@ -14,39 +14,12 @@ typedef struct southbridge_intel_bd82x6x_config config_t; -static int set_bits(void *port, u32 mask, u32 val) -{ - u32 reg32; - int count; - - /* Write (val & mask) to port */ - val &= mask; - reg32 = read32(port); - reg32 &= ~mask; - reg32 |= val; - write32(port, reg32); - - /* Wait for readback of register to match what was just written to it */ - count = 50; - do { - /* Wait 1ms based on BKDG wait time */ - mdelay(1); - reg32 = read32(port); - reg32 &= mask; - } while ((reg32 != val) && --count); - - /* Timeout occurred */ - if (!count) - return -1; - return 0; -} - static int codec_detect(u8 *base) { u8 reg8; /* Set Bit 0 to 1 to exit reset state (BAR + 0x8)[0] */ - if (set_bits(base + HDA_GCTL_REG, HDA_GCTL_CRST, HDA_GCTL_CRST) < 0) + if (azalia_set_bits(base + HDA_GCTL_REG, HDA_GCTL_CRST, HDA_GCTL_CRST) < 0) goto no_codec; /* Write back the value once reset bit is set. */ @@ -63,7 +36,7 @@ static int codec_detect(u8 *base) no_codec: /* Codec Not found */ /* Put HDA back in reset (BAR + 0x8) [0] */ - set_bits(base + HDA_GCTL_REG, 1, 0); + azalia_set_bits(base + HDA_GCTL_REG, 1, 0); printk(BIOS_DEBUG, "Azalia: No codec!\n"); return 0; } |