diff options
Diffstat (limited to 'src/southbridge/intel/bd82x6x')
| -rw-r--r-- | src/southbridge/intel/bd82x6x/early_pch_common.c | 4 | ||||
| -rw-r--r-- | src/southbridge/intel/bd82x6x/early_usb_mrc.c | 4 | ||||
| -rw-r--r-- | src/southbridge/intel/bd82x6x/pch.c | 4 |
3 files changed, 6 insertions, 6 deletions
diff --git a/src/southbridge/intel/bd82x6x/early_pch_common.c b/src/southbridge/intel/bd82x6x/early_pch_common.c index 2ef47a2e46..f1ac4f0e77 100644 --- a/src/southbridge/intel/bd82x6x/early_pch_common.c +++ b/src/southbridge/intel/bd82x6x/early_pch_common.c @@ -66,9 +66,9 @@ int southbridge_detect_s3_resume(void) int rtc_failure(void) { #if defined(__SIMPLE_DEVICE__) - device_t dev = PCI_DEV(0, 0x1f, 0); + pci_devfn_t dev = PCI_DEV(0, 0x1f, 0); #else - device_t dev = dev_find_slot(0, PCI_DEVFN(0x1f, 0)); + struct device *dev = dev_find_slot(0, PCI_DEVFN(0x1f, 0)); #endif return !!(pci_read_config8(dev, GEN_PMCON_3) & RTC_BATTERY_DEAD); } diff --git a/src/southbridge/intel/bd82x6x/early_usb_mrc.c b/src/southbridge/intel/bd82x6x/early_usb_mrc.c index 8fac3c7745..4b9061e800 100644 --- a/src/southbridge/intel/bd82x6x/early_usb_mrc.c +++ b/src/southbridge/intel/bd82x6x/early_usb_mrc.c @@ -32,8 +32,8 @@ */ void enable_usb_bar(void) { - device_t usb0 = PCH_EHCI1_DEV; - device_t usb1 = PCH_EHCI2_DEV; + pci_devfn_t usb0 = PCH_EHCI1_DEV; + pci_devfn_t usb1 = PCH_EHCI2_DEV; u32 cmd; /* USB Controller 1 */ diff --git a/src/southbridge/intel/bd82x6x/pch.c b/src/southbridge/intel/bd82x6x/pch.c index 73c84bbb5d..7ff13a0928 100644 --- a/src/southbridge/intel/bd82x6x/pch.c +++ b/src/southbridge/intel/bd82x6x/pch.c @@ -36,7 +36,7 @@ int pch_silicon_revision(void) pci_devfn_t dev; dev = PCI_DEV(0, 0x1f, 0); #else - device_t dev; + struct device *dev; dev = dev_find_slot(0, PCI_DEVFN(0x1f, 0)); #endif @@ -53,7 +53,7 @@ int pch_silicon_type(void) pci_devfn_t dev; dev = PCI_DEV(0, 0x1f, 0); #else - device_t dev; + struct device *dev; dev = dev_find_slot(0, PCI_DEVFN(0x1f, 0)); #endif |