diff options
Diffstat (limited to 'src/southbridge/intel/bd82x6x')
| -rw-r--r-- | src/southbridge/intel/bd82x6x/acpi/globalnvs.asl | 4 | ||||
| -rw-r--r-- | src/southbridge/intel/bd82x6x/include/soc/nvs.h | 4 | ||||
| -rw-r--r-- | src/southbridge/intel/bd82x6x/lpc.c | 8 |
3 files changed, 4 insertions, 12 deletions
diff --git a/src/southbridge/intel/bd82x6x/acpi/globalnvs.asl b/src/southbridge/intel/bd82x6x/acpi/globalnvs.asl index c6c7397031..23b6769bed 100644 --- a/src/southbridge/intel/bd82x6x/acpi/globalnvs.asl +++ b/src/southbridge/intel/bd82x6x/acpi/globalnvs.asl @@ -53,8 +53,8 @@ Field (GNVS, ByteAcc, NoLock, Preserve) TMPS, 8, // 0x25 - Temperature Sensor ID /* Processor Identification */ Offset (0x28), - APIC, 8, // 0x28 - APIC Enabled by coreboot - MPEN, 8, // 0x29 - Multi Processor Enable + , 8, // 0x28 - Enabled by coreboot + , 8, // 0x29 - Multi Processor Enable PCP0, 8, // 0x2a - PDC CPU/CORE 0 PCP1, 8, // 0x2b - PDC CPU/CORE 1 PPCM, 8, // 0x2c - Max. PPC state diff --git a/src/southbridge/intel/bd82x6x/include/soc/nvs.h b/src/southbridge/intel/bd82x6x/include/soc/nvs.h index 25e5b6edac..969d59209b 100644 --- a/src/southbridge/intel/bd82x6x/include/soc/nvs.h +++ b/src/southbridge/intel/bd82x6x/include/soc/nvs.h @@ -44,8 +44,8 @@ struct __packed global_nvs { u8 tmps; /* 0x25 - Temperature Sensor ID */ u8 rsvd3[2]; /* Processor Identification */ - u8 apic; /* 0x28 - APIC enabled */ - u8 mpen; /* 0x29 - MP capable/enabled */ + u8 unused_was_apic; /* 0x28 - APIC enabled */ + u8 unused_was_mpen; /* 0x29 - MP capable/enabled */ u8 pcp0; /* 0x2a - PDC CPU/CORE 0 */ u8 pcp1; /* 0x2b - PDC CPU/CORE 1 */ u8 ppcm; /* 0x2c - Max. PPC state */ diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c index a351bc3900..d5d39f5ff6 100644 --- a/src/southbridge/intel/bd82x6x/lpc.c +++ b/src/southbridge/intel/bd82x6x/lpc.c @@ -12,7 +12,6 @@ #include <arch/io.h> #include <arch/ioapic.h> #include <acpi/acpi.h> -#include <acpi/acpi_gnvs.h> #include <acpi/acpigen.h> #include <cpu/x86/smm.h> #include <string.h> @@ -24,7 +23,6 @@ #include <southbridge/intel/common/pmutil.h> #include <southbridge/intel/common/rtc.h> #include <southbridge/intel/common/spi.h> -#include <soc/nvs.h> #define NMI_OFF 0 @@ -641,12 +639,6 @@ static void pch_lpc_enable(struct device *dev) pch_enable(dev); } -void soc_fill_gnvs(struct global_nvs *gnvs) -{ - gnvs->apic = 1; - gnvs->mpen = 1; /* Enable Multi Processing */ -} - static const char *lpc_acpi_name(const struct device *dev) { return "LPCB"; |