diff options
Diffstat (limited to 'src/southbridge/intel/bd82x6x')
| -rw-r--r-- | src/southbridge/intel/bd82x6x/pch.h | 4 | ||||
| -rw-r--r-- | src/southbridge/intel/bd82x6x/pci.c | 9 | ||||
| -rw-r--r-- | src/southbridge/intel/bd82x6x/pcie.c | 10 |
3 files changed, 10 insertions, 13 deletions
diff --git a/src/southbridge/intel/bd82x6x/pch.h b/src/southbridge/intel/bd82x6x/pch.h index cb0691fea2..22b91073ce 100644 --- a/src/southbridge/intel/bd82x6x/pch.h +++ b/src/southbridge/intel/bd82x6x/pch.h @@ -101,10 +101,6 @@ void early_usb_init(const struct southbridge_usb_port *portmap); #define SMLT 0x1b #define SECSTS 0x1e #define INTR 0x3c -#define BCTRL 0x3e -#define SBR (1 << 6) -#define SEE (1 << 1) -#define PERE (1 << 0) #define PCH_EHCI1_DEV PCI_DEV(0, 0x1d, 0) #define PCH_EHCI2_DEV PCI_DEV(0, 0x1a, 0) diff --git a/src/southbridge/intel/bd82x6x/pci.c b/src/southbridge/intel/bd82x6x/pci.c index a222893d88..833512a5b7 100644 --- a/src/southbridge/intel/bd82x6x/pci.c +++ b/src/southbridge/intel/bd82x6x/pci.c @@ -17,6 +17,7 @@ #include <console/console.h> #include <device/device.h> #include <device/pci.h> +#include <device/pci_def.h> #include <device/pci_ops.h> #include <device/pci_ids.h> #include "pch.h" @@ -36,10 +37,10 @@ static void pci_init(struct device *dev) pci_write_config8(dev, INTR, 0xff); /* disable parity error response and SERR */ - reg16 = pci_read_config16(dev, BCTRL); - reg16 &= ~(1 << 0); - reg16 &= ~(1 << 1); - pci_write_config16(dev, BCTRL, reg16); + reg16 = pci_read_config16(dev, PCI_BRIDGE_CONTROL); + reg16 &= ~PCI_BRIDGE_CTL_PARITY; + reg16 &= ~PCI_BRIDGE_CTL_SERR; + pci_write_config16(dev, PCI_BRIDGE_CONTROL, reg16); /* Master Latency Count must be set to 0x04! */ reg8 = pci_read_config8(dev, SMLT); diff --git a/src/southbridge/intel/bd82x6x/pcie.c b/src/southbridge/intel/bd82x6x/pcie.c index 686930d80a..739f6ce8a8 100644 --- a/src/southbridge/intel/bd82x6x/pcie.c +++ b/src/southbridge/intel/bd82x6x/pcie.c @@ -17,6 +17,7 @@ #include <console/console.h> #include <device/device.h> #include <device/pci.h> +#include <device/pci_def.h> #include <device/pci_ops.h> #include <device/pciexp.h> #include <device/pci_ids.h> @@ -232,11 +233,10 @@ static void pci_init(struct device *dev) // This has no effect but the OS might expect it pci_write_config8(dev, 0x0c, 0x10); - reg16 = pci_read_config16(dev, 0x3e); - reg16 &= ~(1 << 0); /* disable parity error response */ - // reg16 &= ~(1 << 1); /* disable SERR */ - reg16 |= (1 << 2); /* ISA enable */ - pci_write_config16(dev, 0x3e, reg16); + reg16 = pci_read_config16(dev, PCI_BRIDGE_CONTROL); + reg16 &= ~PCI_BRIDGE_CTL_PARITY; + reg16 |= PCI_BRIDGE_CTL_NO_ISA; + pci_write_config16(dev, PCI_BRIDGE_CONTROL, reg16); #ifdef EVEN_MORE_DEBUG reg32 = pci_read_config32(dev, 0x20); |