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path: root/src/southbridge/intel/bd82x6x/pcie.c
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Diffstat (limited to 'src/southbridge/intel/bd82x6x/pcie.c')
-rw-r--r--src/southbridge/intel/bd82x6x/pcie.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/southbridge/intel/bd82x6x/pcie.c b/src/southbridge/intel/bd82x6x/pcie.c
index 2658fd31ef..45ce5aadd3 100644
--- a/src/southbridge/intel/bd82x6x/pcie.c
+++ b/src/southbridge/intel/bd82x6x/pcie.c
@@ -243,12 +243,18 @@ static void pch_pcie_enable(struct device *dev)
static void pch_pciexp_scan_bridge(struct device *dev)
{
+ uint32_t cap = pci_find_capability(dev, PCI_CAP_ID_PCIE);
+
if (CONFIG(PCIEXP_HOTPLUG) && pci_is_hotplugable(dev)) {
pciexp_hotplug_scan_bridge(dev);
} else {
/* Normal PCIe Scan */
pciexp_scan_bridge(dev);
}
+ if ((pci_read_config16(dev, cap + PCI_EXP_SLTSTA) & PCI_EXP_SLTSTA_PDS) &&
+ !dev_is_active_bridge(dev))
+ printk(BIOS_WARNING, "%s: Has a slow downstream device. Enumeration failed.\n",
+ dev_path(dev));
/* Late Power Management init after bridge device enumeration */
pch_pcie_pm_late(dev);