aboutsummaryrefslogtreecommitdiff
path: root/src/southbridge/intel/bd82x6x/pch.h
diff options
context:
space:
mode:
Diffstat (limited to 'src/southbridge/intel/bd82x6x/pch.h')
-rw-r--r--src/southbridge/intel/bd82x6x/pch.h16
1 files changed, 0 insertions, 16 deletions
diff --git a/src/southbridge/intel/bd82x6x/pch.h b/src/southbridge/intel/bd82x6x/pch.h
index ba4391d999..b30c48cd80 100644
--- a/src/southbridge/intel/bd82x6x/pch.h
+++ b/src/southbridge/intel/bd82x6x/pch.h
@@ -462,22 +462,6 @@ early_usb_init (const struct southbridge_usb_port *portmap);
#define XUSB2PRM 0xd4 /* 32bit */
#define USB3PRM 0xdc /* 32bit */
-/* ICH7 GPIOBASE */
-#define GPIO_USE_SEL 0x00
-#define GP_IO_SEL 0x04
-#define GP_LVL 0x0c
-#define GPO_BLINK 0x18
-#define GPI_INV 0x2c
-#define GPIO_USE_SEL2 0x30
-#define GP_IO_SEL2 0x34
-#define GP_LVL2 0x38
-#define GPIO_USE_SEL3 0x40
-#define GP_IO_SEL3 0x44
-#define GP_LVL3 0x48
-#define GP_RST_SEL1 0x60
-#define GP_RST_SEL2 0x64
-#define GP_RST_SEL3 0x68
-
/* ICH7 PMBASE */
#define PM1_STS 0x00
#define WAK_STS (1 << 15)