diff options
Diffstat (limited to 'src/southbridge/intel/bd82x6x/early_thermal.c')
| -rw-r--r-- | src/southbridge/intel/bd82x6x/early_thermal.c | 39 |
1 files changed, 27 insertions, 12 deletions
diff --git a/src/southbridge/intel/bd82x6x/early_thermal.c b/src/southbridge/intel/bd82x6x/early_thermal.c index 02ec9a7436..f2d04dd8a8 100644 --- a/src/southbridge/intel/bd82x6x/early_thermal.c +++ b/src/southbridge/intel/bd82x6x/early_thermal.c @@ -23,6 +23,21 @@ #include "cpu/intel/model_206ax/model_206ax.h" #include <cpu/x86/msr.h> +static void write8p(uintptr_t addr, uint32_t val) +{ + write8((u8 *)addr, val); +} + +static void write16p(uintptr_t addr, uint32_t val) +{ + write16((u16 *)addr, val); +} + +static uint16_t read16p (uintptr_t addr) +{ + return read16((u16 *)addr); +} + /* Early thermal init, must be done prior to giving ME its memory which is done at the end of raminit. */ void early_thermal_init(void) @@ -41,30 +56,30 @@ void early_thermal_init(void) pci_read_config32(dev, 0x40) | 5); - write16 (0x40000004, 0x3a2b); - write8 (0x4000000c, 0xff); - write8 (0x4000000d, 0x00); - write8 (0x4000000e, 0x40); - write8 (0x40000082, 0x00); - write8 (0x40000001, 0xba); + write16p (0x40000004, 0x3a2b); + write8p (0x4000000c, 0xff); + write8p (0x4000000d, 0x00); + write8p (0x4000000e, 0x40); + write8p (0x40000082, 0x00); + write8p (0x40000001, 0xba); /* Perform init. */ /* Configure TJmax. */ msr = rdmsr(MSR_TEMPERATURE_TARGET); - write16(0x40000012, ((msr.lo >> 16) & 0xff) << 6); + write16p(0x40000012, ((msr.lo >> 16) & 0xff) << 6); /* Northbridge temperature slope and offset. */ - write16(0x40000016, 0x808c); + write16p(0x40000016, 0x808c); - write16 (0x40000014, 0xde87); + write16p (0x40000014, 0xde87); /* Enable thermal data reporting, processor, PCH and northbridge. */ - write16(0x4000001a, (read16(0x4000001a) & ~0xf) | 0x10f0); + write16p(0x4000001a, (read16p(0x4000001a) & ~0xf) | 0x10f0); /* Disable temporary BAR. */ pci_write_config32(dev, 0x40, pci_read_config32(dev, 0x40) & ~1); pci_write_config32(dev, 0x40, 0); - write32 (DEFAULT_RCBA | 0x38b0, - (read32 (DEFAULT_RCBA | 0x38b0) & 0xffff8003) | 0x403c); + write32 (DEFAULT_RCBA + 0x38b0, + (read32 (DEFAULT_RCBA + 0x38b0) & 0xffff8003) | 0x403c); } |